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pnav10.c
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1 /*
2  * Copyright 2004-2009 Analog Devices Inc.
3  * 2005 National ICT Australia (NICTA)
4  * Aidan Williams <[email protected]>
5  *
6  * Licensed under the GPL-2 or later.
7  */
8 
9 #include <linux/device.h>
10 #include <linux/etherdevice.h>
11 #include <linux/export.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/irq.h>
18 #include <asm/dma.h>
19 #include <asm/bfin5xx_spi.h>
20 #include <asm/portmux.h>
21 
22 #include <linux/spi/ad7877.h>
23 
24 /*
25  * Name the Board for the /proc/cpuinfo
26  */
27 const char bfin_board_name[] = "ADI PNAV-1.0";
28 
29 /*
30  * Driver needs to know address, irq and flag pin.
31  */
32 
33 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
34 static struct resource bfin_pcmcia_cf_resources[] = {
35  {
36  .start = 0x20310000, /* IO PORT */
37  .end = 0x20312000,
38  .flags = IORESOURCE_MEM,
39  }, {
40  .start = 0x20311000, /* Attribute Memory */
41  .end = 0x20311FFF,
42  .flags = IORESOURCE_MEM,
43  }, {
44  .start = IRQ_PF4,
45  .end = IRQ_PF4,
47  }, {
48  .start = 6, /* Card Detect PF6 */
49  .end = 6,
50  .flags = IORESOURCE_IRQ,
51  },
52 };
53 
54 static struct platform_device bfin_pcmcia_cf_device = {
55  .name = "bfin_cf_pcmcia",
56  .id = -1,
57  .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
58  .resource = bfin_pcmcia_cf_resources,
59 };
60 #endif
61 
62 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
63 static struct platform_device rtc_device = {
64  .name = "rtc-bfin",
65  .id = -1,
66 };
67 #endif
68 
69 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
70 #include <linux/smc91x.h>
71 
72 static struct smc91x_platdata smc91x_info = {
74  .leda = RPC_LED_100_10,
75  .ledb = RPC_LED_TX_RX,
76 };
77 
78 static struct resource smc91x_resources[] = {
79  {
80  .name = "smc91x-regs",
81  .start = 0x20300300,
82  .end = 0x20300300 + 16,
83  .flags = IORESOURCE_MEM,
84  }, {
85 
86  .start = IRQ_PF7,
87  .end = IRQ_PF7,
89  },
90 };
91 static struct platform_device smc91x_device = {
92  .name = "smc91x",
93  .id = 0,
94  .num_resources = ARRAY_SIZE(smc91x_resources),
95  .resource = smc91x_resources,
96  .dev = {
97  .platform_data = &smc91x_info,
98  },
99 };
100 #endif
101 
102 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
103 #include <linux/bfin_mac.h>
104 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
105 
106 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
107  {
108  .addr = 1,
109  .irq = IRQ_MAC_PHYINT,
110  },
111 };
112 
113 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
114  .phydev_number = 1,
115  .phydev_data = bfin_phydev_data,
116  .phy_mode = PHY_INTERFACE_MODE_RMII,
117  .mac_peripherals = bfin_mac_peripherals,
118 };
119 
120 static struct platform_device bfin_mii_bus = {
121  .name = "bfin_mii_bus",
122  .dev = {
123  .platform_data = &bfin_mii_bus_data,
124  }
125 };
126 
127 static struct platform_device bfin_mac_device = {
128  .name = "bfin_mac",
129  .dev = {
130  .platform_data = &bfin_mii_bus,
131  }
132 };
133 #endif
134 
135 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
136 static struct resource net2272_bfin_resources[] = {
137  {
138  .start = 0x20300000,
139  .end = 0x20300000 + 0x100,
140  .flags = IORESOURCE_MEM,
141  }, {
142  .start = IRQ_PF7,
143  .end = IRQ_PF7,
145  },
146 };
147 
148 static struct platform_device net2272_bfin_device = {
149  .name = "net2272",
150  .id = -1,
151  .num_resources = ARRAY_SIZE(net2272_bfin_resources),
152  .resource = net2272_bfin_resources,
153 };
154 #endif
155 
156 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
157 /* all SPI peripherals info goes here */
158 
159 #if defined(CONFIG_MTD_M25P80) \
160  || defined(CONFIG_MTD_M25P80_MODULE)
161 static struct mtd_partition bfin_spi_flash_partitions[] = {
162  {
163  .name = "bootloader(spi)",
164  .size = 0x00020000,
165  .offset = 0,
166  .mask_flags = MTD_CAP_ROM
167  }, {
168  .name = "linux kernel(spi)",
169  .size = 0xe0000,
170  .offset = 0x20000
171  }, {
172  .name = "file system(spi)",
173  .size = 0x700000,
174  .offset = 0x00100000,
175  }
176 };
177 
178 static struct flash_platform_data bfin_spi_flash_data = {
179  .name = "m25p80",
180  .parts = bfin_spi_flash_partitions,
181  .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
182  .type = "m25p64",
183 };
184 
185 /* SPI flash chip (m25p64) */
186 static struct bfin5xx_spi_chip spi_flash_chip_info = {
187  .enable_dma = 0, /* use dma transfer with this chip*/
188 };
189 #endif
190 
191 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
192 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
193  .enable_dma = 0,
194 };
195 #endif
196 
197 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
198 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
199  .model = 7877,
200  .vref_delay_usecs = 50, /* internal, no capacitor */
201  .x_plate_ohms = 419,
202  .y_plate_ohms = 486,
203  .pressure_max = 1000,
204  .pressure_min = 0,
205  .stopacq_polarity = 1,
206  .first_conversion_delay = 3,
207  .acquisition_time = 1,
208  .averaging = 1,
209  .pen_down_acc_interval = 1,
210 };
211 #endif
212 
213 static struct spi_board_info bfin_spi_board_info[] __initdata = {
214 #if defined(CONFIG_MTD_M25P80) \
215  || defined(CONFIG_MTD_M25P80_MODULE)
216  {
217  /* the modalias must be the same as spi device driver name */
218  .modalias = "m25p80", /* Name of spi_driver for this device */
219  .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
220  .bus_num = 0, /* Framework bus number */
221  .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
222  .platform_data = &bfin_spi_flash_data,
223  .controller_data = &spi_flash_chip_info,
224  .mode = SPI_MODE_3,
225  },
226 #endif
227 
228 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
229  || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
230  {
231  .modalias = "ad183x",
232  .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
233  .bus_num = 0,
234  .chip_select = 4,
235  },
236 #endif
237 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
238  {
239  .modalias = "mmc_spi",
240  .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
241  .bus_num = 0,
242  .chip_select = 5,
243  .controller_data = &mmc_spi_chip_info,
244  .mode = SPI_MODE_3,
245  },
246 #endif
247 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
248 {
249  .modalias = "ad7877",
250  .platform_data = &bfin_ad7877_ts_info,
251  .irq = IRQ_PF2,
252  .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
253  .bus_num = 0,
254  .chip_select = 5,
255 },
256 #endif
257 
258 };
259 
260 /* SPI (0) */
261 static struct resource bfin_spi0_resource[] = {
262  [0] = {
263  .start = SPI0_REGBASE,
264  .end = SPI0_REGBASE + 0xFF,
265  .flags = IORESOURCE_MEM,
266  },
267  [1] = {
268  .start = CH_SPI,
269  .end = CH_SPI,
270  .flags = IORESOURCE_DMA,
271  },
272  [2] = {
273  .start = IRQ_SPI,
274  .end = IRQ_SPI,
275  .flags = IORESOURCE_IRQ,
276  },
277 };
278 
279 /* SPI controller data */
280 static struct bfin5xx_spi_master bfin_spi0_info = {
281  .num_chipselect = 8,
282  .enable_dma = 1, /* master has the ability to do dma transfer */
283  .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
284 };
285 
286 static struct platform_device bfin_spi0_device = {
287  .name = "bfin-spi",
288  .id = 0, /* Bus number */
289  .num_resources = ARRAY_SIZE(bfin_spi0_resource),
290  .resource = bfin_spi0_resource,
291  .dev = {
292  .platform_data = &bfin_spi0_info, /* Passed to driver */
293  },
294 };
295 #endif /* spi master and devices */
296 
297 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
298 static struct platform_device bfin_fb_device = {
299  .name = "bf537-lq035",
300 };
301 #endif
302 
303 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
304 #ifdef CONFIG_SERIAL_BFIN_UART0
305 static struct resource bfin_uart0_resources[] = {
306  {
307  .start = UART0_THR,
308  .end = UART0_GCTL+2,
309  .flags = IORESOURCE_MEM,
310  },
311  {
312  .start = IRQ_UART0_TX,
313  .end = IRQ_UART0_TX,
314  .flags = IORESOURCE_IRQ,
315  },
316  {
317  .start = IRQ_UART0_RX,
318  .end = IRQ_UART0_RX,
319  .flags = IORESOURCE_IRQ,
320  },
321  {
322  .start = IRQ_UART0_ERROR,
323  .end = IRQ_UART0_ERROR,
324  .flags = IORESOURCE_IRQ,
325  },
326  {
327  .start = CH_UART0_TX,
328  .end = CH_UART0_TX,
329  .flags = IORESOURCE_DMA,
330  },
331  {
332  .start = CH_UART0_RX,
333  .end = CH_UART0_RX,
334  .flags = IORESOURCE_DMA,
335  },
336 };
337 
338 static unsigned short bfin_uart0_peripherals[] = {
340 };
341 
342 static struct platform_device bfin_uart0_device = {
343  .name = "bfin-uart",
344  .id = 0,
345  .num_resources = ARRAY_SIZE(bfin_uart0_resources),
346  .resource = bfin_uart0_resources,
347  .dev = {
348  .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
349  },
350 };
351 #endif
352 #ifdef CONFIG_SERIAL_BFIN_UART1
353 static struct resource bfin_uart1_resources[] = {
354  {
355  .start = UART1_THR,
356  .end = UART1_GCTL+2,
357  .flags = IORESOURCE_MEM,
358  },
359  {
360  .start = IRQ_UART1_TX,
361  .end = IRQ_UART1_TX,
362  .flags = IORESOURCE_IRQ,
363  },
364  {
365  .start = IRQ_UART1_RX,
366  .end = IRQ_UART1_RX,
367  .flags = IORESOURCE_IRQ,
368  },
369  {
370  .start = IRQ_UART1_ERROR,
371  .end = IRQ_UART1_ERROR,
372  .flags = IORESOURCE_IRQ,
373  },
374  {
375  .start = CH_UART1_TX,
376  .end = CH_UART1_TX,
377  .flags = IORESOURCE_DMA,
378  },
379  {
380  .start = CH_UART1_RX,
381  .end = CH_UART1_RX,
382  .flags = IORESOURCE_DMA,
383  },
384 };
385 
386 static unsigned short bfin_uart1_peripherals[] = {
388 };
389 
390 static struct platform_device bfin_uart1_device = {
391  .name = "bfin-uart",
392  .id = 1,
393  .num_resources = ARRAY_SIZE(bfin_uart1_resources),
394  .resource = bfin_uart1_resources,
395  .dev = {
396  .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
397  },
398 };
399 #endif
400 #endif
401 
402 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
403 #ifdef CONFIG_BFIN_SIR0
404 static struct resource bfin_sir0_resources[] = {
405  {
406  .start = 0xFFC00400,
407  .end = 0xFFC004FF,
408  .flags = IORESOURCE_MEM,
409  },
410  {
411  .start = IRQ_UART0_RX,
412  .end = IRQ_UART0_RX+1,
413  .flags = IORESOURCE_IRQ,
414  },
415  {
416  .start = CH_UART0_RX,
417  .end = CH_UART0_RX+1,
418  .flags = IORESOURCE_DMA,
419  },
420 };
421 
422 static struct platform_device bfin_sir0_device = {
423  .name = "bfin_sir",
424  .id = 0,
425  .num_resources = ARRAY_SIZE(bfin_sir0_resources),
426  .resource = bfin_sir0_resources,
427 };
428 #endif
429 #ifdef CONFIG_BFIN_SIR1
430 static struct resource bfin_sir1_resources[] = {
431  {
432  .start = 0xFFC02000,
433  .end = 0xFFC020FF,
434  .flags = IORESOURCE_MEM,
435  },
436  {
437  .start = IRQ_UART1_RX,
438  .end = IRQ_UART1_RX+1,
439  .flags = IORESOURCE_IRQ,
440  },
441  {
442  .start = CH_UART1_RX,
443  .end = CH_UART1_RX+1,
444  .flags = IORESOURCE_DMA,
445  },
446 };
447 
448 static struct platform_device bfin_sir1_device = {
449  .name = "bfin_sir",
450  .id = 1,
451  .num_resources = ARRAY_SIZE(bfin_sir1_resources),
452  .resource = bfin_sir1_resources,
453 };
454 #endif
455 #endif
456 
457 static struct platform_device *stamp_devices[] __initdata = {
458 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
459  &bfin_pcmcia_cf_device,
460 #endif
461 
462 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
463  &rtc_device,
464 #endif
465 
466 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
467  &smc91x_device,
468 #endif
469 
470 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
471  &bfin_mii_bus,
472  &bfin_mac_device,
473 #endif
474 
475 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
476  &net2272_bfin_device,
477 #endif
478 
479 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
480  &bfin_spi0_device,
481 #endif
482 
483 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
484  &bfin_fb_device,
485 #endif
486 
487 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
488 #ifdef CONFIG_SERIAL_BFIN_UART0
489  &bfin_uart0_device,
490 #endif
491 #ifdef CONFIG_SERIAL_BFIN_UART1
492  &bfin_uart1_device,
493 #endif
494 #endif
495 
496 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
497 #ifdef CONFIG_BFIN_SIR0
498  &bfin_sir0_device,
499 #endif
500 #ifdef CONFIG_BFIN_SIR1
501  &bfin_sir1_device,
502 #endif
503 #endif
504 };
505 
506 static int __init pnav_init(void)
507 {
508  printk(KERN_INFO "%s(): registering device resources\n", __func__);
509  platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
510 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
511  spi_register_board_info(bfin_spi_board_info,
512  ARRAY_SIZE(bfin_spi_board_info));
513 #endif
514  return 0;
515 }
516 
517 arch_initcall(pnav_init);
518 
519 static struct platform_device *stamp_early_devices[] __initdata = {
520 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
521 #ifdef CONFIG_SERIAL_BFIN_UART0
522  &bfin_uart0_device,
523 #endif
524 #ifdef CONFIG_SERIAL_BFIN_UART1
525  &bfin_uart1_device,
526 #endif
527 #endif
528 };
529 
531 {
532  printk(KERN_INFO "register early platform devices\n");
533  early_platform_add_devices(stamp_early_devices,
534  ARRAY_SIZE(stamp_early_devices));
535 }
536 
538 {
539  return 1;
540 }