15 #include <linux/kernel.h>
16 #include <linux/module.h>
22 #include <linux/slab.h>
30 #define PWM_ACTIVE0 0x10
31 #define PWM_PERIOD0 0x20
32 #define PERIOD_PERIOD(p) ((p) & 0xffff)
33 #define PERIOD_PERIOD_MAX 0x10000
34 #define PERIOD_ACTIVE_HIGH (3 << 16)
35 #define PERIOD_INACTIVE_LOW (2 << 18)
36 #define PERIOD_CDIV(div) (((div) & 0x7) << 20)
37 #define PERIOD_CDIV_MAX 8
46 #define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip)
49 int duty_ns,
int period_ns)
53 unsigned int period_cycles, duty_cycles;
59 c = rate / (1 <<
div);
79 ret = clk_prepare_enable(mxs->
clk);
94 clk_disable_unprepare(mxs->
clk);
104 ret = clk_prepare_enable(mxs->
clk);
119 clk_disable_unprepare(mxs->
clk);
122 static const struct pwm_ops mxs_pwm_ops = {
123 .config = mxs_pwm_config,
124 .enable = mxs_pwm_enable,
125 .disable = mxs_pwm_disable,
146 pinctrl = devm_pinctrl_get_select_default(&pdev->
dev);
148 return PTR_ERR(pinctrl);
151 if (IS_ERR(mxs->
clk))
152 return PTR_ERR(mxs->
clk);
155 mxs->
chip.ops = &mxs_pwm_ops;
157 ret = of_property_read_u32(np,
"fsl,pwm-number", &mxs->
chip.npwm);
159 dev_err(&pdev->
dev,
"failed to get pwm number: %d\n", ret);
165 dev_err(&pdev->
dev,
"failed to add pwm chip %d\n", ret);
170 platform_set_drvdata(pdev, mxs);
185 { .compatible =
"fsl,imx23-pwm", },
195 .probe = mxs_pwm_probe,