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12 #define NUM_SEQ_REGS 0x05
13 #define NUM_CRT_REGS 0x41
14 #define NUM_GRC_REGS 0x09
15 #define NUM_ATC_REGS 0x15
18 #define DDC_SCL_READ_MASK (1 << 2)
19 #define DDC_SCL_WRITE_MASK (1 << 5)
20 #define DDC_SDA_READ_MASK (1 << 3)
21 #define DDC_SDA_WRITE_MASK (1 << 4)
65 struct {
int vram;
int vram_valid; } mtrr;