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ms.h
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1 /* Driver for Realtek PCI-Express card reader
2  * Header file
3  *
4  * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2, or (at your option) any
9  * later version.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, see <http://www.gnu.org/licenses/>.
18  *
19  * Author:
20  * wwang ([email protected])
21  * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22  */
23 
24 #ifndef __REALTEK_RTSX_MS_H
25 #define __REALTEK_RTSX_MS_H
26 
27 #define MS_DELAY_WRITE
28 
29 #define MS_MAX_RETRY_COUNT 3
30 
31 #define MS_EXTRA_SIZE 0x9
32 
33 #define WRT_PRTCT 0x01
34 
35 /* Error Code */
36 #define MS_NO_ERROR 0x00
37 #define MS_CRC16_ERROR 0x80
38 #define MS_TO_ERROR 0x40
39 #define MS_NO_CARD 0x20
40 #define MS_NO_MEMORY 0x10
41 #define MS_CMD_NK 0x08
42 #define MS_FLASH_READ_ERROR 0x04
43 #define MS_FLASH_WRITE_ERROR 0x02
44 #define MS_BREQ_ERROR 0x01
45 #define MS_NOT_FOUND 0x03
46 
47 /* Transfer Protocol Command */
48 #define READ_PAGE_DATA 0x02
49 #define READ_REG 0x04
50 #define GET_INT 0x07
51 #define WRITE_PAGE_DATA 0x0D
52 #define WRITE_REG 0x0B
53 #define SET_RW_REG_ADRS 0x08
54 #define SET_CMD 0x0E
55 
56 #define PRO_READ_LONG_DATA 0x02
57 #define PRO_READ_SHORT_DATA 0x03
58 #define PRO_READ_REG 0x04
59 #define PRO_READ_QUAD_DATA 0x05
60 #define PRO_GET_INT 0x07
61 #define PRO_WRITE_LONG_DATA 0x0D
62 #define PRO_WRITE_SHORT_DATA 0x0C
63 #define PRO_WRITE_QUAD_DATA 0x0A
64 #define PRO_WRITE_REG 0x0B
65 #define PRO_SET_RW_REG_ADRS 0x08
66 #define PRO_SET_CMD 0x0E
67 #define PRO_EX_SET_CMD 0x09
68 
69 #ifdef SUPPORT_MAGIC_GATE
70 
71 #define MG_GET_ID 0x40
72 #define MG_SET_LID 0x41
73 #define MG_GET_LEKB 0x42
74 #define MG_SET_RD 0x43
75 #define MG_MAKE_RMS 0x44
76 #define MG_MAKE_KSE 0x45
77 #define MG_SET_IBD 0x46
78 #define MG_GET_IBD 0x47
79 
80 #endif
81 
82 #ifdef XC_POWERCLASS
83 #define XC_CHG_POWER 0x16
84 #endif
85 
86 #define BLOCK_READ 0xAA
87 #define BLOCK_WRITE 0x55
88 #define BLOCK_END 0x33
89 #define BLOCK_ERASE 0x99
90 #define FLASH_STOP 0xCC
91 
92 #define SLEEP 0x5A
93 #define CLEAR_BUF 0xC3
94 #define MS_RESET 0x3C
95 
96 #define PRO_READ_DATA 0x20
97 #define PRO_WRITE_DATA 0x21
98 #define PRO_READ_ATRB 0x24
99 #define PRO_STOP 0x25
100 #define PRO_ERASE 0x26
101 #define PRO_READ_2K_DATA 0x27
102 #define PRO_WRITE_2K_DATA 0x28
103 
104 #define PRO_FORMAT 0x10
105 #define PRO_SLEEP 0x11
106 
107 #define IntReg 0x01
108 #define StatusReg0 0x02
109 #define StatusReg1 0x03
110 
111 #define SystemParm 0x10
112 #define BlockAdrs 0x11
113 #define CMDParm 0x14
114 #define PageAdrs 0x15
115 
116 #define OverwriteFlag 0x16
117 #define ManagemenFlag 0x17
118 #define LogicalAdrs 0x18
119 #define ReserveArea 0x1A
120 
121 #define Pro_IntReg 0x01
122 #define Pro_StatusReg 0x02
123 #define Pro_TypeReg 0x04
124 #define Pro_IFModeReg 0x05
125 #define Pro_CatagoryReg 0x06
126 #define Pro_ClassReg 0x07
127 
128 
129 #define Pro_SystemParm 0x10
130 #define Pro_DataCount1 0x11
131 #define Pro_DataCount0 0x12
132 #define Pro_DataAddr3 0x13
133 #define Pro_DataAddr2 0x14
134 #define Pro_DataAddr1 0x15
135 #define Pro_DataAddr0 0x16
136 
137 #define Pro_TPCParm 0x17
138 #define Pro_CMDParm 0x18
139 
140 #define INT_REG_CED 0x80
141 #define INT_REG_ERR 0x40
142 #define INT_REG_BREQ 0x20
143 #define INT_REG_CMDNK 0x01
144 
145 #define BLOCK_BOOT 0xC0
146 #define BLOCK_OK 0x80
147 #define PAGE_OK 0x60
148 #define DATA_COMPL 0x10
149 
150 #define NOT_BOOT_BLOCK 0x4
151 #define NOT_TRANSLATION_TABLE 0x8
152 
153 #define HEADER_ID0 PPBUF_BASE2
154 #define HEADER_ID1 (PPBUF_BASE2 + 1)
155 #define DISABLED_BLOCK0 (PPBUF_BASE2 + 0x170 + 4)
156 #define DISABLED_BLOCK1 (PPBUF_BASE2 + 0x170 + 5)
157 #define DISABLED_BLOCK2 (PPBUF_BASE2 + 0x170 + 6)
158 #define DISABLED_BLOCK3 (PPBUF_BASE2 + 0x170 + 7)
159 #define BLOCK_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 2)
160 #define BLOCK_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 3)
161 #define BLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 4)
162 #define BLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 5)
163 #define EBLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 6)
164 #define EBLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 7)
165 #define PAGE_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 8)
166 #define PAGE_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 9)
167 
168 #define MS_Device_Type (PPBUF_BASE2 + 0x1D8)
169 
170 #define MS_4bit_Support (PPBUF_BASE2 + 0x1D3)
171 
172 #define setPS_NG 1
173 #define setPS_Error 0
174 
175 #define PARALLEL_8BIT_IF 0x40
176 #define PARALLEL_4BIT_IF 0x00
177 #define SERIAL_IF 0x80
178 
179 #define BUF_FULL 0x10
180 #define BUF_EMPTY 0x20
181 
182 #define MEDIA_BUSY 0x80
183 #define FLASH_BUSY 0x40
184 #define DATA_ERROR 0x20
185 #define STS_UCDT 0x10
186 #define EXTRA_ERROR 0x08
187 #define STS_UCEX 0x04
188 #define FLAG_ERROR 0x02
189 #define STS_UCFG 0x01
190 
191 #define MS_SHORT_DATA_LEN 32
192 
193 #define FORMAT_SUCCESS 0
194 #define FORMAT_FAIL 1
195 #define FORMAT_IN_PROGRESS 2
196 
197 #define MS_SET_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag |= 0x80)
198 #define MS_CLR_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag &= 0x7F)
199 #define MS_TST_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag & 0x80)
200 
202 
203 void mspro_stop_seq_mode(struct rtsx_chip *chip);
204 int reset_ms_card(struct rtsx_chip *chip);
205 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt);
206 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_len, int quick_format);
207 void ms_free_l2p_tbl(struct rtsx_chip *chip);
208 void ms_cleanup_work(struct rtsx_chip *chip);
209 int ms_power_off_card3v3(struct rtsx_chip *chip);
210 int release_ms_card(struct rtsx_chip *chip);
211 #ifdef MS_DELAY_WRITE
212 int ms_delay_write(struct rtsx_chip *chip);
213 #endif
214 
215 #ifdef SUPPORT_MAGIC_GATE
216 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip);
217 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip);
218 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);
219 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);
220 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip);
221 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);
222 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);
223 #endif
224 
225 #endif /* __REALTEK_RTSX_MS_H */