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33 #ifndef SEP_DRIVER_HW_DEFS__H
34 #define SEP_DRIVER_HW_DEFS__H
43 #define HW_HOST_IRR_REG_ADDR 0x0A00UL
44 #define HW_HOST_IMR_REG_ADDR 0x0A04UL
45 #define HW_HOST_ICR_REG_ADDR 0x0A08UL
46 #define HW_HOST_SEP_HOST_GPR0_REG_ADDR 0x0B00UL
47 #define HW_HOST_SEP_HOST_GPR1_REG_ADDR 0x0B04UL
48 #define HW_HOST_SEP_HOST_GPR2_REG_ADDR 0x0B08UL
49 #define HW_HOST_SEP_HOST_GPR3_REG_ADDR 0x0B0CUL
50 #define HW_HOST_HOST_SEP_GPR0_REG_ADDR 0x0B80UL
51 #define HW_HOST_HOST_SEP_GPR1_REG_ADDR 0x0B84UL
52 #define HW_HOST_HOST_SEP_GPR2_REG_ADDR 0x0B88UL
53 #define HW_HOST_HOST_SEP_GPR3_REG_ADDR 0x0B8CUL
54 #define HW_SRAM_DATA_READY_REG_ADDR 0x0F08UL