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7 #define INTC_NR_IRQS 512
9 #define INTC_NR_IRQS 1024
15 #ifdef CONFIG_CPU_HAS_INTEVT
16 #define evt2irq(evt) (((evt) >> 5) - 16)
17 #define irq2evt(irq) (((irq) + 16) << 5)
19 #define evt2irq(evt) (evt)
20 #define irq2evt(irq) (irq)
30 #define INTC_VECT(enum_id, vect) { enum_id, vect }
31 #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
38 #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
49 #ifdef CONFIG_INTC_BALANCING
50 unsigned long dist_reg;
70 #ifdef CONFIG_INTC_BALANCING
71 #define INTC_SMP_BALANCING(reg) .dist_reg = (reg)
73 #define INTC_SMP_BALANCING(reg)
77 #define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
79 #define INTC_SMP(stride, nr)
99 #define _INTC_ARRAY(a) a, __same_type(a, NULL) ? 0 : sizeof(a)/sizeof(*a)
101 #define INTC_HW_DESC(vectors, groups, mask_regs, \
102 prio_regs, sense_regs, ack_regs) \
104 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
105 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
106 _INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
119 #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
120 mask_regs, prio_regs, sense_regs) \
121 struct intc_desc symbol __initdata = { \
123 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
124 prio_regs, sense_regs, NULL), \
127 #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
128 mask_regs, prio_regs, sense_regs, ack_regs) \
129 struct intc_desc symbol __initdata = { \
131 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
132 prio_regs, sense_regs, ack_regs), \
140 #ifdef CONFIG_INTC_USERIMASK