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15 #ifndef __LINUX_MFD_SMSC_H
16 #define __LINUX_MFD_SMSC_H
20 #define SMSC_ID_ECE1099 1
21 #define SMSC_NUM_CLIENTS 2
23 #define SMSC_BASE_ADDR 0x38
24 #define OMAP_GPIO_SMSC_IRQ 151
26 #define SMSC_MAXGPIO 32
27 #define SMSC_BANK(offs) ((offs) >> 3)
28 #define SMSC_BIT(offs) (1u << ((offs) & 0x7))
42 static inline int smsc_read(
struct device *
child,
unsigned int reg,
50 static inline int smsc_write(
struct device *
child,
unsigned int reg,
59 #define SMSC_RESET 0xF5
60 #define SMSC_GRP_INT 0xF9
61 #define SMSC_CLK_CTRL 0xFA
62 #define SMSC_WKUP_CTRL 0xFB
63 #define SMSC_DEV_ID 0xFC
64 #define SMSC_DEV_REV 0xFD
65 #define SMSC_VEN_ID_L 0xFE
66 #define SMSC_VEN_ID_H 0xFF
69 #define SMSC_CLK_VALUE 0x13
72 #define SMSC_GPIO_DATA_IN_START 0x00
75 #define SMSC_GPIO_DATA_OUT_START 0x05
78 #define SMSC_GPIO_INPUT_LOW 0x01
79 #define SMSC_GPIO_INPUT_RISING 0x09
80 #define SMSC_GPIO_INPUT_FALLING 0x11
81 #define SMSC_GPIO_INPUT_BOTH_EDGE 0x19
82 #define SMSC_GPIO_OUTPUT_PP 0x21
83 #define SMSC_GPIO_OUTPUT_OP 0x31
85 #define GRP_INT_STAT 0xf9
86 #define SMSC_GPI_INT 0x0f
87 #define SMSC_CFG_START 0x0A
90 #define SMSC_GPIO_INT_STAT_START 0x32
93 #define SMSC_GPIO_INT_MASK_START 0x37
96 #define SMSC_KP_OUT 0x40
97 #define SMSC_KP_IN 0x41
98 #define SMSC_KP_INT_STAT 0x42
99 #define SMSC_KP_INT_MASK 0x43
102 #define SMSC_KP_KSO 0x70
103 #define SMSC_KP_KSI 0x51
104 #define SMSC_KSO_ALL_LOW 0x20
105 #define SMSC_KP_SET_LOW_PWR 0x0B
106 #define SMSC_KP_SET_HIGH 0xFF
107 #define SMSC_KSO_EVAL 0x00