Go to the documentation of this file. 1 #ifndef __SOUND_TRIDENT_H
2 #define __SOUND_TRIDENT_H
31 #define TRIDENT_DEVICE_ID_DX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_DX)
32 #define TRIDENT_DEVICE_ID_NX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_NX)
33 #define TRIDENT_DEVICE_ID_SI7018 ((PCI_VENDOR_ID_SI<<16)|PCI_DEVICE_ID_SI_7018)
35 #define SNDRV_TRIDENT_VOICE_TYPE_PCM 0
36 #define SNDRV_TRIDENT_VOICE_TYPE_SYNTH 1
37 #define SNDRV_TRIDENT_VOICE_TYPE_MIDI 2
39 #define SNDRV_TRIDENT_VFLG_RUNNING (1<<0)
42 #define SNDRV_TRIDENT_PAGE_SIZE 4096
43 #define SNDRV_TRIDENT_PAGE_SHIFT 12
44 #define SNDRV_TRIDENT_PAGE_MASK ((1<<SNDRV_TRIDENT_PAGE_SHIFT)-1)
45 #define SNDRV_TRIDENT_MAX_PAGES 4096
51 #define TRID_REG(trident, x) ((trident)->port + (x))
53 #define ID_4DWAVE_DX 0x2000
54 #define ID_4DWAVE_NX 0x2001
60 #define T4D_NUM_BANKS 2
94 #define LEGACY_DMAR0 0x00 // ADR0
95 #define LEGACY_DMAR4 0x04 // CNT0
96 #define LEGACY_DMAR6 0x06 // CNT0 - High bits
97 #define LEGACY_DMAR11 0x0b // MOD
98 #define LEGACY_DMAR15 0x0f // MMR
100 #define T4D_START_A 0x80
101 #define T4D_STOP_A 0x84
102 #define T4D_DLY_A 0x88
103 #define T4D_SIGN_CSO_A 0x8c
104 #define T4D_CSPF_A 0x90
105 #define T4D_CSPF_B 0xbc
106 #define T4D_CEBC_A 0x94
107 #define T4D_AINT_A 0x98
108 #define T4D_AINTEN_A 0x9c
109 #define T4D_LFO_GC_CIR 0xa0
110 #define T4D_MUSICVOL_WAVEVOL 0xa8
111 #define T4D_SBDELTA_DELTA_R 0xac
112 #define T4D_MISCINT 0xb0
113 #define T4D_START_B 0xb4
114 #define T4D_STOP_B 0xb8
115 #define T4D_SBBL_SBCL 0xc0
116 #define T4D_SBCTRL_SBE2R_SBDD 0xc4
117 #define T4D_STIMER 0xc8
118 #define T4D_AINT_B 0xd8
119 #define T4D_AINTEN_B 0xdc
123 #define T4D_MPU401_BASE 0x20
124 #define T4D_MPUR0 0x20
125 #define T4D_MPUR1 0x21
126 #define T4D_MPUR2 0x22
127 #define T4D_MPUR3 0x23
130 #define NX_SPCTRL_SPCSO 0x24
131 #define NX_SPLBA 0x28
132 #define NX_SPESO 0x2c
133 #define NX_SPCSTATUS 0x64
136 #define GAMEPORT_GCR 0x30
137 #define GAMEPORT_MODE_ADC 0x80
138 #define GAMEPORT_LEGACY 0x31
139 #define GAMEPORT_AXES 0x34
146 #define CH_START 0xe0
148 #define CH_DX_CSO_ALPHA_FMS 0xe0
149 #define CH_DX_ESO_DELTA 0xe8
150 #define CH_DX_FMC_RVOL_CVOL 0xec
152 #define CH_NX_DELTA_CSO 0xe0
153 #define CH_NX_DELTA_ESO 0xe8
154 #define CH_NX_ALPHA_FMS_FMC_RVOL_CVOL 0xec
157 #define CH_GVSEL_PAN_VOL_CTRL_EC 0xf0
158 #define CH_EBUF1 0xf4
159 #define CH_EBUF2 0xf8
163 #define DX_ACR0_AC97_W 0x40
164 #define DX_ACR1_AC97_R 0x44
165 #define DX_ACR2_AC97_COM_STAT 0x48
167 #define NX_ACR0_AC97_COM_STAT 0x40
168 #define NX_ACR1_AC97_W 0x44
169 #define NX_ACR2_AC97_R_PRIMARY 0x48
170 #define NX_ACR3_AC97_R_SECONDARY 0x4c
172 #define SI_AC97_WRITE 0x40
173 #define SI_AC97_READ 0x44
174 #define SI_SERIAL_INTF_CTRL 0x48
175 #define SI_AC97_GPIO 0x4c
177 #define SI_SPDIF_CS 0x70
244 #define T4D_DEFAULT_PCM_VOL 10
245 #define T4D_DEFAULT_PCM_PAN 0
246 #define T4D_DEFAULT_PCM_RVOL 127
247 #define T4D_DEFAULT_PCM_CVOL 127
418 int pcm_spdif_device,
419 int max_wavetable_size,