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16 #define WM8955_CLK_MCLK 1
21 #define WM8955_LOUT1_VOLUME 0x02
22 #define WM8955_ROUT1_VOLUME 0x03
23 #define WM8955_DAC_CONTROL 0x05
24 #define WM8955_AUDIO_INTERFACE 0x07
25 #define WM8955_SAMPLE_RATE 0x08
26 #define WM8955_LEFT_DAC_VOLUME 0x0A
27 #define WM8955_RIGHT_DAC_VOLUME 0x0B
28 #define WM8955_BASS_CONTROL 0x0C
29 #define WM8955_TREBLE_CONTROL 0x0D
30 #define WM8955_RESET 0x0F
31 #define WM8955_ADDITIONAL_CONTROL_1 0x17
32 #define WM8955_ADDITIONAL_CONTROL_2 0x18
33 #define WM8955_POWER_MANAGEMENT_1 0x19
34 #define WM8955_POWER_MANAGEMENT_2 0x1A
35 #define WM8955_ADDITIONAL_CONTROL_3 0x1B
36 #define WM8955_LEFT_OUT_MIX_1 0x22
37 #define WM8955_LEFT_OUT_MIX_2 0x23
38 #define WM8955_RIGHT_OUT_MIX_1 0x24
39 #define WM8955_RIGHT_OUT_MIX_2 0x25
40 #define WM8955_MONO_OUT_MIX_1 0x26
41 #define WM8955_MONO_OUT_MIX_2 0x27
42 #define WM8955_LOUT2_VOLUME 0x28
43 #define WM8955_ROUT2_VOLUME 0x29
44 #define WM8955_MONOOUT_VOLUME 0x2A
45 #define WM8955_CLOCKING_PLL 0x2B
46 #define WM8955_PLL_CONTROL_1 0x2C
47 #define WM8955_PLL_CONTROL_2 0x2D
48 #define WM8955_PLL_CONTROL_3 0x2E
49 #define WM8955_PLL_CONTROL_4 0x3B
51 #define WM8955_REGISTER_COUNT 29
52 #define WM8955_MAX_REGISTER 0x3B
61 #define WM8955_LO1VU 0x0100
62 #define WM8955_LO1VU_MASK 0x0100
63 #define WM8955_LO1VU_SHIFT 8
64 #define WM8955_LO1VU_WIDTH 1
65 #define WM8955_LO1ZC 0x0080
66 #define WM8955_LO1ZC_MASK 0x0080
67 #define WM8955_LO1ZC_SHIFT 7
68 #define WM8955_LO1ZC_WIDTH 1
69 #define WM8955_LOUTVOL_MASK 0x007F
70 #define WM8955_LOUTVOL_SHIFT 0
71 #define WM8955_LOUTVOL_WIDTH 7
76 #define WM8955_RO1VU 0x0100
77 #define WM8955_RO1VU_MASK 0x0100
78 #define WM8955_RO1VU_SHIFT 8
79 #define WM8955_RO1VU_WIDTH 1
80 #define WM8955_RO1ZC 0x0080
81 #define WM8955_RO1ZC_MASK 0x0080
82 #define WM8955_RO1ZC_SHIFT 7
83 #define WM8955_RO1ZC_WIDTH 1
84 #define WM8955_ROUTVOL_MASK 0x007F
85 #define WM8955_ROUTVOL_SHIFT 0
86 #define WM8955_ROUTVOL_WIDTH 7
91 #define WM8955_DAT 0x0080
92 #define WM8955_DAT_MASK 0x0080
93 #define WM8955_DAT_SHIFT 7
94 #define WM8955_DAT_WIDTH 1
95 #define WM8955_DACMU 0x0008
96 #define WM8955_DACMU_MASK 0x0008
97 #define WM8955_DACMU_SHIFT 3
98 #define WM8955_DACMU_WIDTH 1
99 #define WM8955_DEEMPH_MASK 0x0006
100 #define WM8955_DEEMPH_SHIFT 1
101 #define WM8955_DEEMPH_WIDTH 2
106 #define WM8955_BCLKINV 0x0080
107 #define WM8955_BCLKINV_MASK 0x0080
108 #define WM8955_BCLKINV_SHIFT 7
109 #define WM8955_BCLKINV_WIDTH 1
110 #define WM8955_MS 0x0040
111 #define WM8955_MS_MASK 0x0040
112 #define WM8955_MS_SHIFT 6
113 #define WM8955_MS_WIDTH 1
114 #define WM8955_LRSWAP 0x0020
115 #define WM8955_LRSWAP_MASK 0x0020
116 #define WM8955_LRSWAP_SHIFT 5
117 #define WM8955_LRSWAP_WIDTH 1
118 #define WM8955_LRP 0x0010
119 #define WM8955_LRP_MASK 0x0010
120 #define WM8955_LRP_SHIFT 4
121 #define WM8955_LRP_WIDTH 1
122 #define WM8955_WL_MASK 0x000C
123 #define WM8955_WL_SHIFT 2
124 #define WM8955_WL_WIDTH 2
125 #define WM8955_FORMAT_MASK 0x0003
126 #define WM8955_FORMAT_SHIFT 0
127 #define WM8955_FORMAT_WIDTH 2
132 #define WM8955_BCLKDIV2 0x0080
133 #define WM8955_BCLKDIV2_MASK 0x0080
134 #define WM8955_BCLKDIV2_SHIFT 7
135 #define WM8955_BCLKDIV2_WIDTH 1
136 #define WM8955_MCLKDIV2 0x0040
137 #define WM8955_MCLKDIV2_MASK 0x0040
138 #define WM8955_MCLKDIV2_SHIFT 6
139 #define WM8955_MCLKDIV2_WIDTH 1
140 #define WM8955_SR_MASK 0x003E
141 #define WM8955_SR_SHIFT 1
142 #define WM8955_SR_WIDTH 5
143 #define WM8955_USB 0x0001
144 #define WM8955_USB_MASK 0x0001
145 #define WM8955_USB_SHIFT 0
146 #define WM8955_USB_WIDTH 1
151 #define WM8955_LDVU 0x0100
152 #define WM8955_LDVU_MASK 0x0100
153 #define WM8955_LDVU_SHIFT 8
154 #define WM8955_LDVU_WIDTH 1
155 #define WM8955_LDACVOL_MASK 0x00FF
156 #define WM8955_LDACVOL_SHIFT 0
157 #define WM8955_LDACVOL_WIDTH 8
162 #define WM8955_RDVU 0x0100
163 #define WM8955_RDVU_MASK 0x0100
164 #define WM8955_RDVU_SHIFT 8
165 #define WM8955_RDVU_WIDTH 1
166 #define WM8955_RDACVOL_MASK 0x00FF
167 #define WM8955_RDACVOL_SHIFT 0
168 #define WM8955_RDACVOL_WIDTH 8
173 #define WM8955_BB 0x0080
174 #define WM8955_BB_MASK 0x0080
175 #define WM8955_BB_SHIFT 7
176 #define WM8955_BB_WIDTH 1
177 #define WM8955_BC 0x0040
178 #define WM8955_BC_MASK 0x0040
179 #define WM8955_BC_SHIFT 6
180 #define WM8955_BC_WIDTH 1
181 #define WM8955_BASS_MASK 0x000F
182 #define WM8955_BASS_SHIFT 0
183 #define WM8955_BASS_WIDTH 4
188 #define WM8955_TC 0x0040
189 #define WM8955_TC_MASK 0x0040
190 #define WM8955_TC_SHIFT 6
191 #define WM8955_TC_WIDTH 1
192 #define WM8955_TRBL_MASK 0x000F
193 #define WM8955_TRBL_SHIFT 0
194 #define WM8955_TRBL_WIDTH 4
199 #define WM8955_RESET_MASK 0x01FF
200 #define WM8955_RESET_SHIFT 0
201 #define WM8955_RESET_WIDTH 9
206 #define WM8955_TSDEN 0x0100
207 #define WM8955_TSDEN_MASK 0x0100
208 #define WM8955_TSDEN_SHIFT 8
209 #define WM8955_TSDEN_WIDTH 1
210 #define WM8955_VSEL_MASK 0x00C0
211 #define WM8955_VSEL_SHIFT 6
212 #define WM8955_VSEL_WIDTH 2
213 #define WM8955_DMONOMIX_MASK 0x0030
214 #define WM8955_DMONOMIX_SHIFT 4
215 #define WM8955_DMONOMIX_WIDTH 2
216 #define WM8955_DACINV 0x0002
217 #define WM8955_DACINV_MASK 0x0002
218 #define WM8955_DACINV_SHIFT 1
219 #define WM8955_DACINV_WIDTH 1
220 #define WM8955_TOEN 0x0001
221 #define WM8955_TOEN_MASK 0x0001
222 #define WM8955_TOEN_SHIFT 0
223 #define WM8955_TOEN_WIDTH 1
228 #define WM8955_OUT3SW_MASK 0x0180
229 #define WM8955_OUT3SW_SHIFT 7
230 #define WM8955_OUT3SW_WIDTH 2
231 #define WM8955_ROUT2INV 0x0010
232 #define WM8955_ROUT2INV_MASK 0x0010
233 #define WM8955_ROUT2INV_SHIFT 4
234 #define WM8955_ROUT2INV_WIDTH 1
235 #define WM8955_DACOSR 0x0001
236 #define WM8955_DACOSR_MASK 0x0001
237 #define WM8955_DACOSR_SHIFT 0
238 #define WM8955_DACOSR_WIDTH 1
243 #define WM8955_VMIDSEL_MASK 0x0180
244 #define WM8955_VMIDSEL_SHIFT 7
245 #define WM8955_VMIDSEL_WIDTH 2
246 #define WM8955_VREF 0x0040
247 #define WM8955_VREF_MASK 0x0040
248 #define WM8955_VREF_SHIFT 6
249 #define WM8955_VREF_WIDTH 1
250 #define WM8955_DIGENB 0x0001
251 #define WM8955_DIGENB_MASK 0x0001
252 #define WM8955_DIGENB_SHIFT 0
253 #define WM8955_DIGENB_WIDTH 1
258 #define WM8955_DACL 0x0100
259 #define WM8955_DACL_MASK 0x0100
260 #define WM8955_DACL_SHIFT 8
261 #define WM8955_DACL_WIDTH 1
262 #define WM8955_DACR 0x0080
263 #define WM8955_DACR_MASK 0x0080
264 #define WM8955_DACR_SHIFT 7
265 #define WM8955_DACR_WIDTH 1
266 #define WM8955_LOUT1 0x0040
267 #define WM8955_LOUT1_MASK 0x0040
268 #define WM8955_LOUT1_SHIFT 6
269 #define WM8955_LOUT1_WIDTH 1
270 #define WM8955_ROUT1 0x0020
271 #define WM8955_ROUT1_MASK 0x0020
272 #define WM8955_ROUT1_SHIFT 5
273 #define WM8955_ROUT1_WIDTH 1
274 #define WM8955_LOUT2 0x0010
275 #define WM8955_LOUT2_MASK 0x0010
276 #define WM8955_LOUT2_SHIFT 4
277 #define WM8955_LOUT2_WIDTH 1
278 #define WM8955_ROUT2 0x0008
279 #define WM8955_ROUT2_MASK 0x0008
280 #define WM8955_ROUT2_SHIFT 3
281 #define WM8955_ROUT2_WIDTH 1
282 #define WM8955_MONO 0x0004
283 #define WM8955_MONO_MASK 0x0004
284 #define WM8955_MONO_SHIFT 2
285 #define WM8955_MONO_WIDTH 1
286 #define WM8955_OUT3 0x0002
287 #define WM8955_OUT3_MASK 0x0002
288 #define WM8955_OUT3_SHIFT 1
289 #define WM8955_OUT3_WIDTH 1
294 #define WM8955_VROI 0x0040
295 #define WM8955_VROI_MASK 0x0040
296 #define WM8955_VROI_SHIFT 6
297 #define WM8955_VROI_WIDTH 1
302 #define WM8955_LD2LO 0x0100
303 #define WM8955_LD2LO_MASK 0x0100
304 #define WM8955_LD2LO_SHIFT 8
305 #define WM8955_LD2LO_WIDTH 1
306 #define WM8955_LI2LO 0x0080
307 #define WM8955_LI2LO_MASK 0x0080
308 #define WM8955_LI2LO_SHIFT 7
309 #define WM8955_LI2LO_WIDTH 1
310 #define WM8955_LI2LOVOL_MASK 0x0070
311 #define WM8955_LI2LOVOL_SHIFT 4
312 #define WM8955_LI2LOVOL_WIDTH 3
317 #define WM8955_RD2LO 0x0100
318 #define WM8955_RD2LO_MASK 0x0100
319 #define WM8955_RD2LO_SHIFT 8
320 #define WM8955_RD2LO_WIDTH 1
321 #define WM8955_RI2LO 0x0080
322 #define WM8955_RI2LO_MASK 0x0080
323 #define WM8955_RI2LO_SHIFT 7
324 #define WM8955_RI2LO_WIDTH 1
325 #define WM8955_RI2LOVOL_MASK 0x0070
326 #define WM8955_RI2LOVOL_SHIFT 4
327 #define WM8955_RI2LOVOL_WIDTH 3
332 #define WM8955_LD2RO 0x0100
333 #define WM8955_LD2RO_MASK 0x0100
334 #define WM8955_LD2RO_SHIFT 8
335 #define WM8955_LD2RO_WIDTH 1
336 #define WM8955_LI2RO 0x0080
337 #define WM8955_LI2RO_MASK 0x0080
338 #define WM8955_LI2RO_SHIFT 7
339 #define WM8955_LI2RO_WIDTH 1
340 #define WM8955_LI2ROVOL_MASK 0x0070
341 #define WM8955_LI2ROVOL_SHIFT 4
342 #define WM8955_LI2ROVOL_WIDTH 3
347 #define WM8955_RD2RO 0x0100
348 #define WM8955_RD2RO_MASK 0x0100
349 #define WM8955_RD2RO_SHIFT 8
350 #define WM8955_RD2RO_WIDTH 1
351 #define WM8955_RI2RO 0x0080
352 #define WM8955_RI2RO_MASK 0x0080
353 #define WM8955_RI2RO_SHIFT 7
354 #define WM8955_RI2RO_WIDTH 1
355 #define WM8955_RI2ROVOL_MASK 0x0070
356 #define WM8955_RI2ROVOL_SHIFT 4
357 #define WM8955_RI2ROVOL_WIDTH 3
362 #define WM8955_LD2MO 0x0100
363 #define WM8955_LD2MO_MASK 0x0100
364 #define WM8955_LD2MO_SHIFT 8
365 #define WM8955_LD2MO_WIDTH 1
366 #define WM8955_LI2MO 0x0080
367 #define WM8955_LI2MO_MASK 0x0080
368 #define WM8955_LI2MO_SHIFT 7
369 #define WM8955_LI2MO_WIDTH 1
370 #define WM8955_LI2MOVOL_MASK 0x0070
371 #define WM8955_LI2MOVOL_SHIFT 4
372 #define WM8955_LI2MOVOL_WIDTH 3
373 #define WM8955_DMEN 0x0001
374 #define WM8955_DMEN_MASK 0x0001
375 #define WM8955_DMEN_SHIFT 0
376 #define WM8955_DMEN_WIDTH 1
381 #define WM8955_RD2MO 0x0100
382 #define WM8955_RD2MO_MASK 0x0100
383 #define WM8955_RD2MO_SHIFT 8
384 #define WM8955_RD2MO_WIDTH 1
385 #define WM8955_RI2MO 0x0080
386 #define WM8955_RI2MO_MASK 0x0080
387 #define WM8955_RI2MO_SHIFT 7
388 #define WM8955_RI2MO_WIDTH 1
389 #define WM8955_RI2MOVOL_MASK 0x0070
390 #define WM8955_RI2MOVOL_SHIFT 4
391 #define WM8955_RI2MOVOL_WIDTH 3
396 #define WM8955_LO2VU 0x0100
397 #define WM8955_LO2VU_MASK 0x0100
398 #define WM8955_LO2VU_SHIFT 8
399 #define WM8955_LO2VU_WIDTH 1
400 #define WM8955_LO2ZC 0x0080
401 #define WM8955_LO2ZC_MASK 0x0080
402 #define WM8955_LO2ZC_SHIFT 7
403 #define WM8955_LO2ZC_WIDTH 1
404 #define WM8955_LOUT2VOL_MASK 0x007F
405 #define WM8955_LOUT2VOL_SHIFT 0
406 #define WM8955_LOUT2VOL_WIDTH 7
411 #define WM8955_RO2VU 0x0100
412 #define WM8955_RO2VU_MASK 0x0100
413 #define WM8955_RO2VU_SHIFT 8
414 #define WM8955_RO2VU_WIDTH 1
415 #define WM8955_RO2ZC 0x0080
416 #define WM8955_RO2ZC_MASK 0x0080
417 #define WM8955_RO2ZC_SHIFT 7
418 #define WM8955_RO2ZC_WIDTH 1
419 #define WM8955_ROUT2VOL_MASK 0x007F
420 #define WM8955_ROUT2VOL_SHIFT 0
421 #define WM8955_ROUT2VOL_WIDTH 7
426 #define WM8955_MOZC 0x0080
427 #define WM8955_MOZC_MASK 0x0080
428 #define WM8955_MOZC_SHIFT 7
429 #define WM8955_MOZC_WIDTH 1
430 #define WM8955_MOUTVOL_MASK 0x007F
431 #define WM8955_MOUTVOL_SHIFT 0
432 #define WM8955_MOUTVOL_WIDTH 7
437 #define WM8955_MCLKSEL 0x0100
438 #define WM8955_MCLKSEL_MASK 0x0100
439 #define WM8955_MCLKSEL_SHIFT 8
440 #define WM8955_MCLKSEL_WIDTH 1
441 #define WM8955_PLLOUTDIV2 0x0020
442 #define WM8955_PLLOUTDIV2_MASK 0x0020
443 #define WM8955_PLLOUTDIV2_SHIFT 5
444 #define WM8955_PLLOUTDIV2_WIDTH 1
445 #define WM8955_PLL_RB 0x0010
446 #define WM8955_PLL_RB_MASK 0x0010
447 #define WM8955_PLL_RB_SHIFT 4
448 #define WM8955_PLL_RB_WIDTH 1
449 #define WM8955_PLLEN 0x0008
450 #define WM8955_PLLEN_MASK 0x0008
451 #define WM8955_PLLEN_SHIFT 3
452 #define WM8955_PLLEN_WIDTH 1
457 #define WM8955_N_MASK 0x01E0
458 #define WM8955_N_SHIFT 5
459 #define WM8955_N_WIDTH 4
460 #define WM8955_K_21_18_MASK 0x000F
461 #define WM8955_K_21_18_SHIFT 0
462 #define WM8955_K_21_18_WIDTH 4
467 #define WM8955_K_17_9_MASK 0x01FF
468 #define WM8955_K_17_9_SHIFT 0
469 #define WM8955_K_17_9_WIDTH 9
474 #define WM8955_K_8_0_MASK 0x01FF
475 #define WM8955_K_8_0_SHIFT 0
476 #define WM8955_K_8_0_WIDTH 9
481 #define WM8955_KEN 0x0080
482 #define WM8955_KEN_MASK 0x0080
483 #define WM8955_KEN_SHIFT 7
484 #define WM8955_KEN_WIDTH 1