33 #include <linux/sched.h>
40 #define MODULE_init 0x0dec
41 #define MODULE_self_test 0x8800
42 #define MODULE_reset 0xffff
44 #define MODE_mask 0xf000
45 #define MODE_null 0x0000
46 #define MODE_test 0x2000
47 #define MODE_status 0x8000
48 #define STAT_int 0x0001
49 #define STAT_tr_char 0x0002
50 #define STAT_rr_char 0x0004
51 #define STAT_cmd_ready 0x0008
52 #define STAT_dma_ready 0x0010
53 #define STAT_digitized 0x0020
54 #define STAT_new_index 0x0040
55 #define STAT_new_status 0x0080
56 #define STAT_dma_state 0x0100
57 #define STAT_index_valid 0x0200
58 #define STAT_flushing 0x0400
59 #define STAT_self_test 0x0800
60 #define MODE_ready 0xc000
61 #define READY_boot 0x0000
62 #define READY_kernel 0x0001
63 #define MODE_error 0xf000
65 #define CMD_mask 0xf000
66 #define CMD_null 0x0000
67 #define CMD_control 0x1000
68 #define CTRL_mask 0x0F00
69 #define CTRL_data 0x00FF
70 #define CTRL_null 0x0000
71 #define CTRL_vol_up 0x0100
72 #define CTRL_vol_down 0x0200
73 #define CTRL_vol_set 0x0300
74 #define CTRL_pause 0x0400
75 #define CTRL_resume 0x0500
76 #define CTRL_resume_spc 0x0001
77 #define CTRL_flush 0x0600
78 #define CTRL_int_enable 0x0700
79 #define CTRL_buff_free 0x0800
80 #define CTRL_buff_used 0x0900
81 #define CTRL_speech 0x0a00
82 #define CTRL_SP_voice 0x0001
83 #define CTRL_SP_rate 0x0002
84 #define CTRL_SP_comma 0x0003
85 #define CTRL_SP_period 0x0004
86 #define CTRL_SP_rate_delta 0x0005
87 #define CTRL_SP_get_param 0x0006
88 #define CTRL_last_index 0x0b00
89 #define CTRL_io_priority 0x0c00
90 #define CTRL_free_mem 0x0d00
91 #define CTRL_get_lang 0x0e00
93 #define CMD_test 0x2000
94 #define TEST_mask 0x0F00
95 #define TEST_null 0x0000
96 #define TEST_isa_int 0x0100
97 #define TEST_echo 0x0200
98 #define TEST_seg 0x0300
99 #define TEST_off 0x0400
100 #define TEST_peek 0x0500
101 #define TEST_poke 0x0600
102 #define TEST_sub_code 0x00FF
103 #define CMD_id 0x3000
104 #define ID_null 0x0000
105 #define ID_kernel 0x0100
106 #define ID_boot 0x0200
107 #define CMD_dma 0x4000
108 #define CMD_reset 0x5000
109 #define CMD_sync 0x6000
110 #define CMD_char_in 0x7000
111 #define CMD_char_out 0x8000
112 #define CHAR_count_1 0x0100
113 #define CHAR_count_2 0x0200
114 #define CHAR_count_3 0x0300
115 #define CMD_spc_mode 0x9000
116 #define CMD_spc_to_text 0x0100
117 #define CMD_spc_to_digit 0x0200
118 #define CMD_spc_rate 0x0400
119 #define CMD_error 0xf000
123 #define DMA_single_in 0x01
124 #define DMA_single_out 0x02
125 #define DMA_buff_in 0x03
126 #define DMA_buff_out 0x04
127 #define DMA_control 0x05
128 #define DT_MEM_ALLOC 0x03
129 #define DT_SET_DIC 0x04
130 #define DT_START_TASK 0x05
131 #define DT_LOAD_MEM 0x06
132 #define DT_READ_MEM 0x07
133 #define DT_DIGITAL_IN 0x08
134 #define DMA_sync 0x06
135 #define DMA_sync_char 0x07
137 #define DRV_VERSION "2.12"
138 #define PROCSPEECH 0x0b
139 #define SYNTH_IO_EXTENT 8
142 static void dtpc_release(
void);
147 static int synth_portlist[] = { 0x340, 0x350, 0x240, 0x250, 0 };
148 static int in_escape, is_flushing;
149 static int dt_stat, dma_state;
151 static struct var_t vars[] = {
154 {
RATE, .u.n = {
"[:ra %d]", 9, 0, 18, 150, 25,
NULL } },
155 {
PITCH, .u.n = {
"[:dv ap %d]", 80, 0, 100, 20, 0,
NULL } },
156 {
VOL, .u.n = {
"[:vo se %d]", 5, 0, 9, 5, 10,
NULL } },
157 {
PUNCT, .u.n = {
"[:pu %c]", 0, 0, 2, 0, 0,
"nsa" } },
158 {
VOICE, .u.n = {
"[:n%c]", 0, 0, 9, 0, 0,
"phfdburwkv" } },
196 static struct attribute *synth_attrs[] = {
197 &caps_start_attribute.
attr,
198 &caps_stop_attribute.
attr,
199 &pitch_attribute.
attr,
200 &punct_attribute.
attr,
201 &rate_attribute.
attr,
202 &voice_attribute.
attr,
204 &delay_time_attribute.
attr,
205 &direct_attribute.
attr,
206 &full_time_attribute.
attr,
207 &jiffy_delta_attribute.
attr,
208 &trigger_time_attribute.
attr,
215 .long_name =
"Dectalk PC",
216 .init =
"[:pe -380]",
226 .probe = synth_probe,
227 .release = dtpc_release,
229 .catch_up = do_catch_up,
230 .flush = synth_flush,
232 .synth_adjust =
NULL,
233 .read_buff_add =
NULL,
242 .attrs = synth_attrs,
247 static int dt_getstatus(
void)
260 static int dt_waitbit(
int bit)
263 while (--timeout > 0) {
264 if ((dt_getstatus() & bit) == bit)
271 static int dt_wait_dma(
void)
273 int timeout = 100,
state = dma_state;
276 while (--timeout > 0) {
285 static int dt_ctrl(
u_int cmd)
316 for (timeout = 0; timeout < 10; timeout++) {
324 for (timeout = 0; timeout < 10; timeout++) {
334 static int dt_sendchar(
char ch)
346 static int testkernel(
void)
349 if (dt_getstatus() == 0xffff) {
356 else if (dt_stat&0x8000)
358 else if (dt_stat == 0x0dec)
359 pr_warn(
"dec_pc at 0x%x, software not loaded\n",
367 static void do_catch_up(
struct spk_synth *synth)
372 unsigned long jiff_max;
373 struct var_t *jiffy_delta;
374 struct var_t *delay_time;
381 jiffy_delta_val = jiffy_delta->
u.
n.value;
383 jiff_max =
jiffies + jiffy_delta_val;
399 delay_time_val = delay_time->
u.
n.value;
403 if (dt_sendchar(ch)) {
415 else if (ch <=
SPACE) {
416 if (!in_escape &&
strchr(
",.!?;:", last))
418 if (jiffies >= jiff_max) {
422 jiffy_delta_val = jiffy_delta->
u.
n.value;
423 delay_time_val = delay_time->
u.
n.value;
427 jiff_max =
jiffies + jiffy_delta_val;
437 static const char *synth_immediate(
struct spk_synth *synth,
const char *
buf)
440 while ((ch = *buf)) {
450 static int synth_probe(
struct spk_synth *synth)
452 int i = 0, failed = 0;
454 for (i = 0; synth_portlist[
i]; i++) {
456 pr_warn(
"request_region: failed with 0x%x, %d\n",
461 failed = testkernel();
476 static void dtpc_release(
void)
487 static int __init decpc_init(
void)
492 static void __exit decpc_exit(
void)