27 #include <linux/mii.h>
29 #include <linux/slab.h>
34 #define MII_BUSY 0x00000001
35 #define MII_WRITE 0x00000002
37 static int stmmac_mdio_busy_wait(
void __iomem *
ioaddr,
unsigned int mii_addr)
67 unsigned int mii_address = priv->
hw->mii.addr;
68 unsigned int mii_data = priv->
hw->mii.data;
71 u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
72 ((phyreg << 6) & (0x000007C0)));
75 if (stmmac_mdio_busy_wait(priv->
ioaddr, mii_address))
80 if (stmmac_mdio_busy_wait(priv->
ioaddr, mii_address))
97 static int stmmac_mdio_write(
struct mii_bus *bus,
int phyaddr,
int phyreg,
102 unsigned int mii_address = priv->
hw->mii.addr;
103 unsigned int mii_data = priv->
hw->mii.data;
106 (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
112 if (stmmac_mdio_busy_wait(priv->
ioaddr, mii_address))
120 return stmmac_mdio_busy_wait(priv->
ioaddr, mii_address);
128 static int stmmac_mdio_reset(
struct mii_bus *bus)
130 #if defined(CONFIG_STMMAC_PLATFORM)
133 unsigned int mii_address = priv->
hw->mii.addr;
135 if (priv->
plat->mdio_bus_data->phy_reset) {
136 pr_debug(
"stmmac_mdio_reset: calling phy_reset\n");
137 priv->
plat->mdio_bus_data->phy_reset(priv->
plat->bsp_priv);
166 new_bus = mdiobus_alloc();
170 if (mdio_bus_data->
irqs)
171 irqlist = mdio_bus_data->
irqs;
175 new_bus->
name =
"stmmac";
176 new_bus->
read = &stmmac_mdio_read;
177 new_bus->
write = &stmmac_mdio_write;
178 new_bus->
reset = &stmmac_mdio_reset;
182 new_bus->
irq = irqlist;
187 pr_err(
"%s: Cannot register as MDIO bus\n", new_bus->
name);
188 goto bus_register_fail;
205 if ((mdio_bus_data->
irqs ==
NULL) &&
216 if (priv->
plat->phy_addr == -1)
219 act = (priv->
plat->phy_addr ==
addr);
220 switch (phydev->
irq) {
232 pr_info(
"%s: PHY ID %08x at %d IRQ %s (%s)%s\n",
234 irq_str, dev_name(&phydev->
dev),
235 act ?
" active" :
"");