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supp_reg.h
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1 #ifndef __SUPP_REG_H__
2 #define __SUPP_REG_H__
3 
4 /* Macros for reading and writing support/special registers. */
5 
6 #ifndef STRINGIFYFY
7 #define STRINGIFYFY(i) #i
8 #endif
9 
10 #ifndef STRINGIFY
11 #define STRINGIFY(i) STRINGIFYFY(i)
12 #endif
13 
14 #define SPEC_REG_BZ "BZ"
15 #define SPEC_REG_VR "VR"
16 #define SPEC_REG_PID "PID"
17 #define SPEC_REG_SRS "SRS"
18 #define SPEC_REG_WZ "WZ"
19 #define SPEC_REG_EXS "EXS"
20 #define SPEC_REG_EDA "EDA"
21 #define SPEC_REG_MOF "MOF"
22 #define SPEC_REG_DZ "DZ"
23 #define SPEC_REG_EBP "EBP"
24 #define SPEC_REG_ERP "ERP"
25 #define SPEC_REG_SRP "SRP"
26 #define SPEC_REG_NRP "NRP"
27 #define SPEC_REG_CCS "CCS"
28 #define SPEC_REG_USP "USP"
29 #define SPEC_REG_SPC "SPC"
30 
31 #define RW_MM_CFG 0
32 #define RW_MM_KBASE_LO 1
33 #define RW_MM_KBASE_HI 2
34 #define RW_MM_CAUSE 3
35 #define RW_MM_TLB_SEL 4
36 #define RW_MM_TLB_LO 5
37 #define RW_MM_TLB_HI 6
38 #define RW_MM_TLB_PGD 7
39 
40 #define BANK_GC 0
41 #define BANK_IM 1
42 #define BANK_DM 2
43 #define BANK_BP 3
44 
45 #define RW_GC_CFG 0
46 #define RW_GC_CCS 1
47 #define RW_GC_SRS 2
48 #define RW_GC_NRP 3
49 #define RW_GC_EXS 4
50 #define RW_GC_R0 8
51 #define RW_GC_R1 9
52 
53 #define SPEC_REG_WR(r,v) \
54 __asm__ __volatile__ ("move %0, $" r : : "r" (v));
55 
56 #define SPEC_REG_RD(r,v) \
57 __asm__ __volatile__ ("move $" r ",%0" : "=r" (v));
58 
59 #define NOP() \
60  __asm__ __volatile__ ("nop");
61 
62 #define SUPP_BANK_SEL(b) \
63  SPEC_REG_WR(SPEC_REG_SRS,b); \
64  NOP(); \
65  NOP(); \
66  NOP();
67 
68 #define SUPP_REG_WR(r,v) \
69 __asm__ __volatile__ ("move %0, $S" STRINGIFYFY(r) "\n\t" \
70  "nop\n\t" \
71  "nop\n\t" \
72  "nop\n\t" \
73  : : "r" (v));
74 
75 #define SUPP_REG_RD(r,v) \
76 __asm__ __volatile__ ("move $S" STRINGIFYFY(r) ",%0" : "=r" (v));
77 
78 #endif /* __SUPP_REG_H__ */