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23 #ifndef _TWL4030_MADC_H
24 #define _TWL4030_MADC_H
33 #define TWL4030_MADC_MAX_CHANNELS 16
68 #define TWL4030_MADC_CTRL1 0x00
69 #define TWL4030_MADC_CTRL2 0x01
71 #define TWL4030_MADC_RTSELECT_LSB 0x02
72 #define TWL4030_MADC_SW1SELECT_LSB 0x06
73 #define TWL4030_MADC_SW2SELECT_LSB 0x0A
75 #define TWL4030_MADC_RTAVERAGE_LSB 0x04
76 #define TWL4030_MADC_SW1AVERAGE_LSB 0x08
77 #define TWL4030_MADC_SW2AVERAGE_LSB 0x0C
79 #define TWL4030_MADC_CTRL_SW1 0x12
80 #define TWL4030_MADC_CTRL_SW2 0x13
82 #define TWL4030_MADC_RTCH0_LSB 0x17
83 #define TWL4030_MADC_GPCH0_LSB 0x37
85 #define TWL4030_MADC_MADCON (1 << 0)
86 #define TWL4030_MADC_BUSY (1 << 0)
88 #define TWL4030_MADC_EOC_SW (1 << 1)
90 #define TWL4030_MADC_SW_START (1 << 5)
91 #define TWL4030_MADC_ADCIN0 (1 << 0)
92 #define TWL4030_MADC_ADCIN1 (1 << 1)
93 #define TWL4030_MADC_ADCIN2 (1 << 2)
94 #define TWL4030_MADC_ADCIN3 (1 << 3)
95 #define TWL4030_MADC_ADCIN4 (1 << 4)
96 #define TWL4030_MADC_ADCIN5 (1 << 5)
97 #define TWL4030_MADC_ADCIN6 (1 << 6)
98 #define TWL4030_MADC_ADCIN7 (1 << 7)
99 #define TWL4030_MADC_ADCIN8 (1 << 8)
100 #define TWL4030_MADC_ADCIN9 (1 << 9)
101 #define TWL4030_MADC_ADCIN10 (1 << 10)
102 #define TWL4030_MADC_ADCIN11 (1 << 11)
103 #define TWL4030_MADC_ADCIN12 (1 << 12)
104 #define TWL4030_MADC_ADCIN13 (1 << 13)
105 #define TWL4030_MADC_ADCIN14 (1 << 14)
106 #define TWL4030_MADC_ADCIN15 (1 << 15)
109 #define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1
110 #define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8
111 #define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9
112 #define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10
113 #define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11
114 #define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12
117 #define TEMP_STEP_SIZE 147
118 #define TEMP_PSR_R 100
119 #define CURR_STEP_SIZE 147
120 #define CURR_PSR_R1 44
121 #define CURR_PSR_R2 88
123 #define TWL4030_BCI_BCICTL1 0x23
124 #define TWL4030_BCI_CGAIN 0x020
125 #define TWL4030_BCI_MESBAT (1 << 1)
126 #define TWL4030_BCI_TYPEN (1 << 4)
127 #define TWL4030_BCI_ITHEN (1 << 3)
129 #define REG_BCICTL2 0x024
130 #define TWL4030_BCI_ITHSENS 0x007
133 #define TWL4030_REG_GPBR1 0x0c
134 #define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)