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arch
x86
include
asm
pgtable-2level.h
Go to the documentation of this file.
1
#ifndef _ASM_X86_PGTABLE_2LEVEL_H
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#define _ASM_X86_PGTABLE_2LEVEL_H
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#define pte_ERROR(e) \
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pr_err("%s:%d: bad pte %08lx\n", __FILE__, __LINE__, (e).pte_low)
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#define pgd_ERROR(e) \
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pr_err("%s:%d: bad pgd %08lx\n", __FILE__, __LINE__, pgd_val(e))
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/*
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* Certain architectures need to do special things when PTEs
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* within a page table are directly modified. Thus, the following
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* hook is made available.
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*/
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static
inline
void
native_set_pte(
pte_t
*ptep ,
pte_t
pte
)
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{
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*ptep =
pte
;
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}
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static
inline
void
native_set_pmd(
pmd_t
*pmdp,
pmd_t
pmd
)
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{
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*pmdp =
pmd
;
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}
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static
inline
void
native_set_pte_atomic(
pte_t
*ptep,
pte_t
pte
)
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{
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native_set_pte(ptep, pte);
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}
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static
inline
void
native_pmd_clear(
pmd_t
*pmdp)
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{
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native_set_pmd(pmdp,
__pmd
(0));
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}
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static
inline
void
native_pte_clear(
struct
mm_struct
*mm,
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unsigned
long
addr
,
pte_t
*
xp
)
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{
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*xp = native_make_pte(0);
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}
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#ifdef CONFIG_SMP
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static
inline
pte_t
native_ptep_get_and_clear
(
pte_t
*
xp
)
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{
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return
__pte
(
xchg
(&xp->
pte_low
, 0));
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}
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#else
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#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
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#endif
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#ifdef CONFIG_SMP
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static
inline
pmd_t
native_pmdp_get_and_clear
(
pmd_t
*xp)
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{
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return
__pmd
(
xchg
((
pmdval_t
*)xp, 0));
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}
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#else
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#define native_pmdp_get_and_clear(xp) native_local_pmdp_get_and_clear(xp)
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#endif
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/*
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* Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,
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* split up the 29 bits of offset into this range:
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*/
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#define PTE_FILE_MAX_BITS 29
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#define PTE_FILE_SHIFT1 (_PAGE_BIT_PRESENT + 1)
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#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
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#define PTE_FILE_SHIFT2 (_PAGE_BIT_FILE + 1)
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#define PTE_FILE_SHIFT3 (_PAGE_BIT_PROTNONE + 1)
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#else
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#define PTE_FILE_SHIFT2 (_PAGE_BIT_PROTNONE + 1)
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#define PTE_FILE_SHIFT3 (_PAGE_BIT_FILE + 1)
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#endif
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#define PTE_FILE_BITS1 (PTE_FILE_SHIFT2 - PTE_FILE_SHIFT1 - 1)
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#define PTE_FILE_BITS2 (PTE_FILE_SHIFT3 - PTE_FILE_SHIFT2 - 1)
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#define pte_to_pgoff(pte) \
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((((pte).pte_low >> PTE_FILE_SHIFT1) \
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& ((1U << PTE_FILE_BITS1) - 1)) \
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+ ((((pte).pte_low >> PTE_FILE_SHIFT2) \
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& ((1U << PTE_FILE_BITS2) - 1)) << PTE_FILE_BITS1) \
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+ (((pte).pte_low >> PTE_FILE_SHIFT3) \
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<< (PTE_FILE_BITS1 + PTE_FILE_BITS2)))
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#define pgoff_to_pte(off) \
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((pte_t) { .pte_low = \
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(((off) & ((1U << PTE_FILE_BITS1) - 1)) << PTE_FILE_SHIFT1) \
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+ ((((off) >> PTE_FILE_BITS1) & ((1U << PTE_FILE_BITS2) - 1)) \
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<< PTE_FILE_SHIFT2) \
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+ (((off) >> (PTE_FILE_BITS1 + PTE_FILE_BITS2)) \
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<< PTE_FILE_SHIFT3) \
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+ _PAGE_FILE })
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/* Encode and de-code a swap entry */
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#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
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#define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
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#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
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#else
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#define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1)
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#define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1)
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#endif
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#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
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#define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \
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& ((1U << SWP_TYPE_BITS) - 1))
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#define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT)
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#define __swp_entry(type, offset) ((swp_entry_t) { \
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((type) << (_PAGE_BIT_PRESENT + 1)) \
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| ((offset) << SWP_OFFSET_SHIFT) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low })
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#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
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#endif
/* _ASM_X86_PGTABLE_2LEVEL_H */
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