18 #include <asm/processor.h>
19 #include <asm/mmu_context.h>
20 #include <asm/tlbflush.h>
21 #include <asm/cacheflush.h>
24 static inline void __flush_itlb_all (
void)
28 for (w = 0; w < ITLB_ARF_WAYS; w++) {
31 invalidate_itlb_entry_no_isync(e);
34 asm volatile (
"isync\n");
37 static inline void __flush_dtlb_all (
void)
41 for (w = 0; w < DTLB_ARF_WAYS; w++) {
44 invalidate_dtlb_entry_no_isync(e);
47 asm volatile (
"isync\n");
68 __get_new_mmu_context(mm);
69 __load_mmu_context(mm);
76 #define _ITLB_ENTRIES (ITLB_ARF_WAYS << XCHAL_ITLB_ARF_ENTRIES_LOG2)
77 #define _DTLB_ENTRIES (DTLB_ARF_WAYS << XCHAL_DTLB_ARF_ENTRIES_LOG2)
78 #if _ITLB_ENTRIES > _DTLB_ENTRIES
79 # define _TLB_ENTRIES _ITLB_ENTRIES
81 # define _TLB_ENTRIES _DTLB_ENTRIES
85 unsigned long start,
unsigned long end)
94 printk(
"[tlbrange<%02lx,%08lx,%08lx>]\n",
95 (
unsigned long)mm->
context, start, end);
100 int oldpid = get_rasid_register();
101 set_rasid_register (ASID_INSERT(mm->
context));
105 invalidate_itlb_mapping(start);
106 invalidate_dtlb_mapping(start);
111 invalidate_dtlb_mapping(start);
115 set_rasid_register(oldpid);
133 oldpid = get_rasid_register();
136 invalidate_itlb_mapping(page);
137 invalidate_dtlb_mapping(page);
139 set_rasid_register(oldpid);