LLVM API Documentation

AArch64FixupKinds.h
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00001 //===-- AArch64FixupKinds.h - AArch64 Specific Fixup Entries ----*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 
00010 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H
00011 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H
00012 
00013 #include "llvm/MC/MCFixup.h"
00014 
00015 namespace llvm {
00016 namespace AArch64 {
00017 
00018 enum Fixups {
00019   // fixup_aarch64_pcrel_adr_imm21 - A 21-bit pc-relative immediate inserted into
00020   // an ADR instruction.
00021   fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind,
00022 
00023   // fixup_aarch64_pcrel_adrp_imm21 - A 21-bit pc-relative immediate inserted into
00024   // an ADRP instruction.
00025   fixup_aarch64_pcrel_adrp_imm21,
00026 
00027   // fixup_aarch64_imm12 - 12-bit fixup for add/sub instructions.
00028   //     No alignment adjustment. All value bits are encoded.
00029   fixup_aarch64_add_imm12,
00030 
00031   // fixup_aarch64_ldst_imm12_* - unsigned 12-bit fixups for load and
00032   // store instructions.
00033   fixup_aarch64_ldst_imm12_scale1,
00034   fixup_aarch64_ldst_imm12_scale2,
00035   fixup_aarch64_ldst_imm12_scale4,
00036   fixup_aarch64_ldst_imm12_scale8,
00037   fixup_aarch64_ldst_imm12_scale16,
00038 
00039   // fixup_aarch64_ldr_pcrel_imm19 - The high 19 bits of a 21-bit pc-relative
00040   // immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is used by
00041   // pc-relative loads and generates relocations directly when necessary.
00042   fixup_aarch64_ldr_pcrel_imm19,
00043 
00044   // FIXME: comment
00045   fixup_aarch64_movw,
00046 
00047   // fixup_aarch64_pcrel_imm14 - The high 14 bits of a 21-bit pc-relative
00048   // immediate.
00049   fixup_aarch64_pcrel_branch14,
00050 
00051   // fixup_aarch64_pcrel_branch19 - The high 19 bits of a 21-bit pc-relative
00052   // immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is use by
00053   // b.cc and generates relocations directly when necessary.
00054   fixup_aarch64_pcrel_branch19,
00055 
00056   // fixup_aarch64_pcrel_branch26 - The high 26 bits of a 28-bit pc-relative
00057   // immediate.
00058   fixup_aarch64_pcrel_branch26,
00059 
00060   // fixup_aarch64_pcrel_call26 - The high 26 bits of a 28-bit pc-relative
00061   // immediate. Distinguished from branch26 only on ELF.
00062   fixup_aarch64_pcrel_call26,
00063 
00064   // fixup_aarch64_tlsdesc_call - zero-space placeholder for the ELF
00065   // R_AARCH64_TLSDESC_CALL relocation.
00066   fixup_aarch64_tlsdesc_call,
00067 
00068   // Marker
00069   LastTargetFixupKind,
00070   NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
00071 };
00072 
00073 } // end namespace AArch64
00074 } // end namespace llvm
00075 
00076 #endif