LLVM API Documentation

AArch64MCTargetDesc.h
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00001 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file provides AArch64 specific target descriptions.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
00015 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
00016 
00017 #include "llvm/Support/DataTypes.h"
00018 #include <string>
00019 
00020 namespace llvm {
00021 class MCAsmBackend;
00022 class MCCodeEmitter;
00023 class MCContext;
00024 class MCInstrInfo;
00025 class MCRegisterInfo;
00026 class MCObjectWriter;
00027 class MCSubtargetInfo;
00028 class StringRef;
00029 class Target;
00030 class raw_ostream;
00031 
00032 extern Target TheAArch64leTarget;
00033 extern Target TheAArch64beTarget;
00034 extern Target TheARM64Target;
00035 
00036 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
00037                                         const MCRegisterInfo &MRI,
00038                                         const MCSubtargetInfo &STI,
00039                                         MCContext &Ctx);
00040 MCAsmBackend *createAArch64leAsmBackend(const Target &T,
00041                                         const MCRegisterInfo &MRI, StringRef TT,
00042                                         StringRef CPU);
00043 MCAsmBackend *createAArch64beAsmBackend(const Target &T,
00044                                         const MCRegisterInfo &MRI, StringRef TT,
00045                                         StringRef CPU);
00046 
00047 MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
00048                                              bool IsLittleEndian);
00049 
00050 MCObjectWriter *createAArch64MachObjectWriter(raw_ostream &OS, uint32_t CPUType,
00051                                             uint32_t CPUSubtype);
00052 
00053 } // End llvm namespace
00054 
00055 // Defines symbolic names for AArch64 registers.  This defines a mapping from
00056 // register name to register number.
00057 //
00058 #define GET_REGINFO_ENUM
00059 #include "AArch64GenRegisterInfo.inc"
00060 
00061 // Defines symbolic names for the AArch64 instructions.
00062 //
00063 #define GET_INSTRINFO_ENUM
00064 #include "AArch64GenInstrInfo.inc"
00065 
00066 #define GET_SUBTARGETINFO_ENUM
00067 #include "AArch64GenSubtargetInfo.inc"
00068 
00069 #endif