LLVM API Documentation

AArch64TargetMachine.h
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00001 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file declares the AArch64 specific subclass of TargetMachine.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
00015 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
00016 
00017 #include "AArch64InstrInfo.h"
00018 #include "AArch64Subtarget.h"
00019 #include "llvm/IR/DataLayout.h"
00020 #include "llvm/Target/TargetMachine.h"
00021 
00022 namespace llvm {
00023 
00024 class AArch64TargetMachine : public LLVMTargetMachine {
00025 protected:
00026   AArch64Subtarget Subtarget;
00027 
00028 public:
00029   AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
00030                        StringRef FS, const TargetOptions &Options,
00031                        Reloc::Model RM, CodeModel::Model CM,
00032                        CodeGenOpt::Level OL, bool IsLittleEndian);
00033 
00034   const AArch64Subtarget *getSubtargetImpl() const override {
00035     return &Subtarget;
00036   }
00037 
00038   // Pass Pipeline Configuration
00039   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
00040 
00041   /// \brief Register AArch64 analysis passes with a pass manager.
00042   void addAnalysisPasses(PassManagerBase &PM) override;
00043 
00044   /// \brief Query if the PBQP register allocator is being used
00045   bool isPBQPUsed() const { return usingPBQP; }
00046 
00047 private:
00048   bool usingPBQP;
00049 };
00050 
00051 // AArch64leTargetMachine - AArch64 little endian target machine.
00052 //
00053 class AArch64leTargetMachine : public AArch64TargetMachine {
00054   virtual void anchor();
00055 public:
00056   AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU,
00057                          StringRef FS, const TargetOptions &Options,
00058                          Reloc::Model RM, CodeModel::Model CM,
00059                          CodeGenOpt::Level OL);
00060 };
00061 
00062 // AArch64beTargetMachine - AArch64 big endian target machine.
00063 //
00064 class AArch64beTargetMachine : public AArch64TargetMachine {
00065   virtual void anchor();
00066 public:
00067   AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU,
00068                          StringRef FS, const TargetOptions &Options,
00069                          Reloc::Model RM, CodeModel::Model CM,
00070                          CodeGenOpt::Level OL);
00071 };
00072 
00073 } // end namespace llvm
00074 
00075 #endif