LLVM API Documentation

AMDGPUMCCodeEmitter.h
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00001 //===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 /// \file
00011 /// \brief CodeEmitter interface for R600 and SI codegen.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
00016 #define LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
00017 
00018 #include "llvm/MC/MCCodeEmitter.h"
00019 #include "llvm/Support/raw_ostream.h"
00020 
00021 namespace llvm {
00022 
00023 class MCInst;
00024 class MCOperand;
00025 class MCSubtargetInfo;
00026 
00027 class AMDGPUMCCodeEmitter : public MCCodeEmitter {
00028   virtual void anchor();
00029 public:
00030 
00031   uint64_t getBinaryCodeForInstr(const MCInst &MI,
00032                                  SmallVectorImpl<MCFixup> &Fixups,
00033                                  const MCSubtargetInfo &STI) const;
00034 
00035   virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
00036                                      SmallVectorImpl<MCFixup> &Fixups,
00037                                      const MCSubtargetInfo &STI) const {
00038     return 0;
00039   }
00040 
00041   virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
00042                                      SmallVectorImpl<MCFixup> &Fixups,
00043                                      const MCSubtargetInfo &STI) const {
00044     return 0;
00045   }
00046 };
00047 
00048 } // End namespace llvm
00049 
00050 #endif