llvm::MCSubtargetInfo Class Reference

#include <MCSubtargetInfo.h>

Inheritance diagram for llvm::MCSubtargetInfo:

List of all members.

Public Member Functions
void	InitMCSubtargetInfo (StringRef TT, StringRef CPU, StringRef FS, ArrayRef< SubtargetFeatureKV > PF, ArrayRef< SubtargetFeatureKV > PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP)
StringRef	getTargetTriple () const
	getTargetTriple - Return the target triple string.
uint64_t	getFeatureBits () const
void	setFeatureBits (uint64_t FeatureBits_)
void	InitMCProcessorInfo (StringRef CPU, StringRef FS)
void	InitCPUSchedModel (StringRef CPU)
	InitCPUSchedModel - Recompute scheduling model based on CPU.
uint64_t	ToggleFeature (uint64_t FB)
uint64_t	ToggleFeature (StringRef FS)
MCSchedModel	getSchedModelForCPU (StringRef CPU) const
const MCSchedModel &	getSchedModel () const
const MCWriteProcResEntry *	getWriteProcResBegin (const MCSchedClassDesc *SC) const
const MCWriteProcResEntry *	getWriteProcResEnd (const MCSchedClassDesc *SC) const
const MCWriteLatencyEntry *	getWriteLatencyEntry (const MCSchedClassDesc *SC, unsigned DefIdx) const
int	getReadAdvanceCycles (const MCSchedClassDesc *SC, unsigned UseIdx, unsigned WriteResID) const
InstrItineraryData	getInstrItineraryForCPU (StringRef CPU) const
void	initInstrItins (InstrItineraryData &InstrItins) const
	Initialize an InstrItineraryData instance.

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Detailed Description

MCSubtargetInfo - Generic base class for all target subtargets.

Definition at line 29 of file MCSubtargetInfo.h.

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Member Function Documentation

uint64_t llvm::MCSubtargetInfo::getFeatureBits

(

)

const [inline]

getFeatureBits - Return the feature bits.

Definition at line 64 of file MCSubtargetInfo.h.

Referenced by llvm::AArch64InstPrinter::AArch64InstPrinter(), llvm::ARMInstPrinter::ARMInstPrinter(), createAMDGPUMCCodeEmitter(), llvm::CreateX86AsmInstrumentation(), DecodeMRSSystemRegister(), DecodeMSRSystemRegister(), llvm::MipsRegInfoRecord::EmitMipsOptionRecord(), llvm::MCInstrDesc::getDeprecatedInfo(), getITDeprecationInfo(), getMCRDeprecationInfo(), llvm::MipsTargetELFStreamer::isN32(), llvm::MipsTargetELFStreamer::isN64(), llvm::MipsTargetELFStreamer::isO32(), isThumb(), llvm::MipsTargetELFStreamer::MipsTargetELFStreamer(), llvm::NVPTXInstPrinter::NVPTXInstPrinter(), llvm::final< T >::X86ATTInstPrinter(), and llvm::X86Disassembler::X86GenericDisassembler::X86GenericDisassembler().

InstrItineraryData MCSubtargetInfo::getInstrItineraryForCPU

(

StringRef

CPU

)

const

getInstrItineraryForCPU - Get scheduling itinerary of a CPU.

Definition at line 105 of file MCSubtargetInfo.cpp.

References getSchedModelForCPU().

Referenced by getItineraryLatency().

int llvm::MCSubtargetInfo::getReadAdvanceCycles	(	const MCSchedClassDesc *	SC,
		unsigned	UseIdx,
		unsigned	WriteResID
	)		const [inline]

Definition at line 114 of file MCSubtargetInfo.h.

References I, llvm::MCSchedClassDesc::NumReadAdvanceEntries, and llvm::MCSchedClassDesc::ReadAdvanceIdx.

Referenced by llvm::TargetSchedModel::computeOperandLatency().

const MCSchedModel& llvm::MCSubtargetInfo::getSchedModel

(

)

const [inline]

getSchedModel - Get the machine model for this subtarget's CPU.

Definition at line 93 of file MCSubtargetInfo.h.

Referenced by llvm::TargetSubtargetInfo::enablePostMachineScheduler(), getLatency(), and llvm::ScheduleDAGInstrs::ScheduleDAGInstrs().

MCSchedModel MCSubtargetInfo::getSchedModelForCPU

(

StringRef

CPU

)

const

getSchedModelForCPU - Get the machine model of a CPU.

Definition at line 80 of file MCSubtargetInfo.cpp.

References llvm::errs(), llvm::MCSchedModel::GetDefaultSchedModel(), llvm::SubtargetInfoKV::Key, llvm::ArrayRef< T >::size(), llvm::LibFunc::strcmp, and llvm::SubtargetInfoKV::Value.

Referenced by getInstrItineraryForCPU(), and InitCPUSchedModel().

StringRef llvm::MCSubtargetInfo::getTargetTriple

(

)

const [inline]

getTargetTriple - Return the target triple string.

Definition at line 58 of file MCSubtargetInfo.h.

Referenced by llvm::createPPCMCCodeEmitter(), createPPCMCInstPrinter(), llvm::CreateX86AsmInstrumentation(), llvm::MipsRegInfoRecord::EmitMipsOptionRecord(), and llvm::MipsTargetELFStreamer::MipsTargetELFStreamer().

const MCWriteLatencyEntry* llvm::MCSubtargetInfo::getWriteLatencyEntry	(	const MCSchedClassDesc *	SC,
		unsigned	DefIdx
	)		const [inline]

Definition at line 106 of file MCSubtargetInfo.h.

References llvm::MCSchedClassDesc::WriteLatencyIdx.

Referenced by llvm::TargetSchedModel::computeInstrLatency(), llvm::TargetSchedModel::computeOperandLatency(), and getLatency().

const MCWriteProcResEntry* llvm::MCSubtargetInfo::getWriteProcResBegin

(

const MCSchedClassDesc *

SC

)

const [inline]

Return an iterator at the first process resource consumed by the given scheduling class.

Definition at line 97 of file MCSubtargetInfo.h.

References llvm::MCSchedClassDesc::WriteProcResIdx.

Referenced by llvm::TargetSchedModel::computeOutputLatency(), llvm::TargetSchedModel::getWriteProcResBegin(), and getWriteProcResEnd().

const MCWriteProcResEntry* llvm::MCSubtargetInfo::getWriteProcResEnd

(

const MCSchedClassDesc *

SC

)

const [inline]

Definition at line 101 of file MCSubtargetInfo.h.

References getWriteProcResBegin(), and llvm::MCSchedClassDesc::NumWriteProcResEntries.

Referenced by llvm::TargetSchedModel::computeOutputLatency(), and llvm::TargetSchedModel::getWriteProcResEnd().

void MCSubtargetInfo::InitCPUSchedModel

(

StringRef

CPU

)

InitCPUSchedModel - Recompute scheduling model based on CPU.

Definition at line 30 of file MCSubtargetInfo.cpp.

References llvm::StringRef::empty(), llvm::MCSchedModel::GetDefaultSchedModel(), and getSchedModelForCPU().

Referenced by InitMCProcessorInfo().

void MCSubtargetInfo::initInstrItins

(

InstrItineraryData &

InstrItins

)

const

Initialize an InstrItineraryData instance.

Definition at line 111 of file MCSubtargetInfo.cpp.

Referenced by llvm::TargetSchedModel::init().

void MCSubtargetInfo::InitMCProcessorInfo	(	StringRef	CPU,
		StringRef	FS
	)

InitMCProcessorInfo - Set or change the CPU (optionally supplemented with feature string). Recompute feature bits and scheduling model.

Definition at line 23 of file MCSubtargetInfo.cpp.

References Features, llvm::SubtargetFeatures::getFeatureBits(), and InitCPUSchedModel().

Referenced by InitMCSubtargetInfo().

void MCSubtargetInfo::InitMCSubtargetInfo	(	StringRef	TT,
		StringRef	CPU,
		StringRef	FS,
		ArrayRef< SubtargetFeatureKV >	PF,
		ArrayRef< SubtargetFeatureKV >	PD,
		const SubtargetInfoKV *	ProcSched,
		const MCWriteProcResEntry *	WPR,
		const MCWriteLatencyEntry *	WL,
		const MCReadAdvanceEntry *	RA,
		const InstrStage *	IS,
		const unsigned *	OC,
		const unsigned *	FP
	)

Definition at line 38 of file MCSubtargetInfo.cpp.

References InitMCProcessorInfo(), llvm::SystemZISD::OC, and llvm::X86II::PD.

void llvm::MCSubtargetInfo::setFeatureBits

(

uint64_t

FeatureBits_

)

[inline]

setFeatureBits - Set the feature bits.

Definition at line 70 of file MCSubtargetInfo.h.

uint64_t MCSubtargetInfo::ToggleFeature

(

uint64_t

FB

)

ToggleFeature - Toggle a feature and returns the re-computed feature bits. This version does not change the implied bits.

Definition at line 65 of file MCSubtargetInfo.cpp.

uint64_t MCSubtargetInfo::ToggleFeature

(

StringRef

FS

)

ToggleFeature - Toggle a feature and returns the re-computed feature bits. This version will also change all implied bits.

Definition at line 72 of file MCSubtargetInfo.cpp.

References Features, and llvm::SubtargetFeatures::ToggleFeature().

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The documentation for this class was generated from the following files:

• MCSubtargetInfo.h
• MCSubtargetInfo.cpp