LLVM API Documentation
00001 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This implements routines for translating functions from LLVM IR into 00011 // Machine IR. 00012 // 00013 //===----------------------------------------------------------------------===// 00014 00015 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 00016 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 00017 00018 #include "llvm/ADT/APInt.h" 00019 #include "llvm/ADT/DenseMap.h" 00020 #include "llvm/ADT/IndexedMap.h" 00021 #include "llvm/ADT/SmallPtrSet.h" 00022 #include "llvm/ADT/SmallVector.h" 00023 #include "llvm/CodeGen/MachineBasicBlock.h" 00024 #include "llvm/IR/InlineAsm.h" 00025 #include "llvm/IR/Instructions.h" 00026 #include "llvm/Target/TargetRegisterInfo.h" 00027 #include <vector> 00028 00029 namespace llvm { 00030 00031 class AllocaInst; 00032 class BasicBlock; 00033 class BranchProbabilityInfo; 00034 class CallInst; 00035 class Function; 00036 class GlobalVariable; 00037 class Instruction; 00038 class MachineInstr; 00039 class MachineBasicBlock; 00040 class MachineFunction; 00041 class MachineModuleInfo; 00042 class MachineRegisterInfo; 00043 class SelectionDAG; 00044 class MVT; 00045 class TargetLowering; 00046 class Value; 00047 00048 //===--------------------------------------------------------------------===// 00049 /// FunctionLoweringInfo - This contains information that is global to a 00050 /// function that is used when lowering a region of the function. 00051 /// 00052 class FunctionLoweringInfo { 00053 const TargetMachine &TM; 00054 public: 00055 const Function *Fn; 00056 MachineFunction *MF; 00057 MachineRegisterInfo *RegInfo; 00058 BranchProbabilityInfo *BPI; 00059 /// CanLowerReturn - true iff the function's return value can be lowered to 00060 /// registers. 00061 bool CanLowerReturn; 00062 00063 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg 00064 /// allocated to hold a pointer to the hidden sret parameter. 00065 unsigned DemoteRegister; 00066 00067 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry. 00068 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap; 00069 00070 /// ValueMap - Since we emit code for the function a basic block at a time, 00071 /// we must remember which virtual registers hold the values for 00072 /// cross-basic-block values. 00073 DenseMap<const Value*, unsigned> ValueMap; 00074 00075 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in 00076 /// the entry block. This allows the allocas to be efficiently referenced 00077 /// anywhere in the function. 00078 DenseMap<const AllocaInst*, int> StaticAllocaMap; 00079 00080 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments. 00081 DenseMap<const Argument*, int> ByValArgFrameIndexMap; 00082 00083 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for 00084 /// function arguments that are inserted after scheduling is completed. 00085 SmallVector<MachineInstr*, 8> ArgDbgValues; 00086 00087 /// RegFixups - Registers which need to be replaced after isel is done. 00088 DenseMap<unsigned, unsigned> RegFixups; 00089 00090 /// MBB - The current block. 00091 MachineBasicBlock *MBB; 00092 00093 /// MBB - The current insert position inside the current block. 00094 MachineBasicBlock::iterator InsertPt; 00095 00096 #ifndef NDEBUG 00097 SmallPtrSet<const Instruction *, 8> CatchInfoLost; 00098 SmallPtrSet<const Instruction *, 8> CatchInfoFound; 00099 #endif 00100 00101 struct LiveOutInfo { 00102 unsigned NumSignBits : 31; 00103 bool IsValid : 1; 00104 APInt KnownOne, KnownZero; 00105 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), 00106 KnownZero(1, 0) {} 00107 }; 00108 00109 /// VisitedBBs - The set of basic blocks visited thus far by instruction 00110 /// selection. 00111 SmallPtrSet<const BasicBlock*, 4> VisitedBBs; 00112 00113 /// PHINodesToUpdate - A list of phi instructions whose operand list will 00114 /// be updated after processing the current basic block. 00115 /// TODO: This isn't per-function state, it's per-basic-block state. But 00116 /// there's no other convenient place for it to live right now. 00117 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate; 00118 unsigned OrigNumPHINodesToUpdate; 00119 00120 /// If the current MBB is a landing pad, the exception pointer and exception 00121 /// selector registers are copied into these virtual registers by 00122 /// SelectionDAGISel::PrepareEHLandingPad(). 00123 unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg; 00124 00125 explicit FunctionLoweringInfo(const TargetMachine &TM) : TM(TM) {} 00126 00127 /// set - Initialize this FunctionLoweringInfo with the given Function 00128 /// and its associated MachineFunction. 00129 /// 00130 void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG); 00131 00132 /// clear - Clear out all the function-specific state. This returns this 00133 /// FunctionLoweringInfo to an empty state, ready to be used for a 00134 /// different function. 00135 void clear(); 00136 00137 /// isExportedInst - Return true if the specified value is an instruction 00138 /// exported from its block. 00139 bool isExportedInst(const Value *V) { 00140 return ValueMap.count(V); 00141 } 00142 00143 unsigned CreateReg(MVT VT); 00144 00145 unsigned CreateRegs(Type *Ty); 00146 00147 unsigned InitializeRegForValue(const Value *V) { 00148 unsigned &R = ValueMap[V]; 00149 assert(R == 0 && "Already initialized this value register!"); 00150 return R = CreateRegs(V->getType()); 00151 } 00152 00153 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 00154 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. 00155 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) { 00156 if (!LiveOutRegInfo.inBounds(Reg)) 00157 return nullptr; 00158 00159 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; 00160 if (!LOI->IsValid) 00161 return nullptr; 00162 00163 return LOI; 00164 } 00165 00166 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 00167 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If 00168 /// the register's LiveOutInfo is for a smaller bit width, it is extended to 00169 /// the larger bit width by zero extension. The bit width must be no smaller 00170 /// than the LiveOutInfo's existing bit width. 00171 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth); 00172 00173 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register. 00174 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, 00175 const APInt &KnownZero, const APInt &KnownOne) { 00176 // Only install this information if it tells us something. 00177 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) 00178 return; 00179 00180 LiveOutRegInfo.grow(Reg); 00181 LiveOutInfo &LOI = LiveOutRegInfo[Reg]; 00182 LOI.NumSignBits = NumSignBits; 00183 LOI.KnownOne = KnownOne; 00184 LOI.KnownZero = KnownZero; 00185 } 00186 00187 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination 00188 /// register based on the LiveOutInfo of its operands. 00189 void ComputePHILiveOutRegInfo(const PHINode*); 00190 00191 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be 00192 /// called when a block is visited before all of its predecessors. 00193 void InvalidatePHILiveOutRegInfo(const PHINode *PN) { 00194 // PHIs with no uses have no ValueMap entry. 00195 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN); 00196 if (It == ValueMap.end()) 00197 return; 00198 00199 unsigned Reg = It->second; 00200 LiveOutRegInfo.grow(Reg); 00201 LiveOutRegInfo[Reg].IsValid = false; 00202 } 00203 00204 /// setArgumentFrameIndex - Record frame index for the byval 00205 /// argument. 00206 void setArgumentFrameIndex(const Argument *A, int FI); 00207 00208 /// getArgumentFrameIndex - Get frame index for the byval argument. 00209 int getArgumentFrameIndex(const Argument *A); 00210 00211 private: 00212 /// LiveOutRegInfo - Information about live out vregs. 00213 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo; 00214 }; 00215 00216 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are 00217 /// being passed to this variadic function, and set the MachineModuleInfo's 00218 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined 00219 /// reference to _fltused on Windows, which will link in MSVCRT's 00220 /// floating-point support. 00221 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI); 00222 00223 /// AddCatchInfo - Extract the personality and type infos from an eh.selector 00224 /// call, and add them to the specified machine basic block. 00225 void AddCatchInfo(const CallInst &I, 00226 MachineModuleInfo *MMI, MachineBasicBlock *MBB); 00227 00228 /// AddLandingPadInfo - Extract the exception handling information from the 00229 /// landingpad instruction and add them to the specified machine module info. 00230 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI, 00231 MachineBasicBlock *MBB); 00232 00233 } // end namespace llvm 00234 00235 #endif