LLVM API Documentation

MipsMCCodeEmitter.h
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00001 //===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file defines the MipsMCCodeEmitter class.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 //
00014 
00015 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
00016 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
00017 
00018 #include "llvm/MC/MCCodeEmitter.h"
00019 #include "llvm/Support/DataTypes.h"
00020 
00021 using namespace llvm;
00022 
00023 namespace llvm {
00024 class MCContext;
00025 class MCExpr;
00026 class MCInst;
00027 class MCInstrInfo;
00028 class MCFixup;
00029 class MCOperand;
00030 class MCSubtargetInfo;
00031 class raw_ostream;
00032 
00033 class MipsMCCodeEmitter : public MCCodeEmitter {
00034   MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
00035   void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
00036   const MCInstrInfo &MCII;
00037   MCContext &Ctx;
00038   bool IsLittleEndian;
00039 
00040   bool isMicroMips(const MCSubtargetInfo &STI) const;
00041 
00042 public:
00043   MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
00044       : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
00045 
00046   ~MipsMCCodeEmitter() {}
00047 
00048   void EmitByte(unsigned char C, raw_ostream &OS) const;
00049 
00050   void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
00051                        raw_ostream &OS) const;
00052 
00053   void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
00054                          SmallVectorImpl<MCFixup> &Fixups,
00055                          const MCSubtargetInfo &STI) const override;
00056 
00057   // getBinaryCodeForInstr - TableGen'erated function for getting the
00058   // binary encoding for an instruction.
00059   uint64_t getBinaryCodeForInstr(const MCInst &MI,
00060                                  SmallVectorImpl<MCFixup> &Fixups,
00061                                  const MCSubtargetInfo &STI) const;
00062 
00063   // getBranchJumpOpValue - Return binary encoding of the jump
00064   // target operand. If the machine operand requires relocation,
00065   // record the relocation and return zero.
00066   unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
00067                                 SmallVectorImpl<MCFixup> &Fixups,
00068                                 const MCSubtargetInfo &STI) const;
00069 
00070   // getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
00071   // target operand. If the machine operand requires relocation,
00072   // record the relocation and return zero.
00073   unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
00074                                   SmallVectorImpl<MCFixup> &Fixups,
00075                                   const MCSubtargetInfo &STI) const;
00076 
00077   // getUImm5Lsl2Encoding - Return binary encoding of the microMIPS jump
00078   // target operand.
00079   unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
00080                                 SmallVectorImpl<MCFixup> &Fixups,
00081                                 const MCSubtargetInfo &STI) const;
00082 
00083   // getBranchTargetOpValue - Return binary encoding of the branch
00084   // target operand. If the machine operand requires relocation,
00085   // record the relocation and return zero.
00086   unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
00087                                   SmallVectorImpl<MCFixup> &Fixups,
00088                                   const MCSubtargetInfo &STI) const;
00089 
00090   // getBranchTargetOpValue - Return binary encoding of the microMIPS branch
00091   // target operand. If the machine operand requires relocation,
00092   // record the relocation and return zero.
00093   unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
00094                                     SmallVectorImpl<MCFixup> &Fixups,
00095                                     const MCSubtargetInfo &STI) const;
00096 
00097   // getBranchTarget21OpValue - Return binary encoding of the branch
00098   // offset operand. If the machine operand requires relocation,
00099   // record the relocation and return zero.
00100   unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
00101                                    SmallVectorImpl<MCFixup> &Fixups,
00102                                    const MCSubtargetInfo &STI) const;
00103 
00104   // getBranchTarget26OpValue - Return binary encoding of the branch
00105   // offset operand. If the machine operand requires relocation,
00106   // record the relocation and return zero.
00107   unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
00108                                     SmallVectorImpl<MCFixup> &Fixups,
00109                                     const MCSubtargetInfo &STI) const;
00110 
00111   // getJumpOffset16OpValue - Return binary encoding of the jump
00112   // offset operand. If the machine operand requires relocation,
00113   // record the relocation and return zero.
00114   unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
00115                                   SmallVectorImpl<MCFixup> &Fixups,
00116                                   const MCSubtargetInfo &STI) const;
00117 
00118   // getMachineOpValue - Return binary encoding of operand. If the machin
00119   // operand requires relocation, record the relocation and return zero.
00120   unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
00121                              SmallVectorImpl<MCFixup> &Fixups,
00122                              const MCSubtargetInfo &STI) const;
00123 
00124   unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
00125                              SmallVectorImpl<MCFixup> &Fixups,
00126                              const MCSubtargetInfo &STI) const;
00127 
00128   unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
00129                           SmallVectorImpl<MCFixup> &Fixups,
00130                           const MCSubtargetInfo &STI) const;
00131   unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
00132                                  SmallVectorImpl<MCFixup> &Fixups,
00133                                  const MCSubtargetInfo &STI) const;
00134   unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
00135                               SmallVectorImpl<MCFixup> &Fixups,
00136                               const MCSubtargetInfo &STI) const;
00137   unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
00138                               SmallVectorImpl<MCFixup> &Fixups,
00139                               const MCSubtargetInfo &STI) const;
00140 
00141   // getLSAImmEncoding - Return binary encoding of LSA immediate.
00142   unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
00143                              SmallVectorImpl<MCFixup> &Fixups,
00144                              const MCSubtargetInfo &STI) const;
00145 
00146   unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo,
00147                                  SmallVectorImpl<MCFixup> &Fixups,
00148                                  const MCSubtargetInfo &STI) const;
00149 
00150   unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
00151                                  SmallVectorImpl<MCFixup> &Fixups,
00152                                  const MCSubtargetInfo &STI) const;
00153 
00154   unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
00155                           const MCSubtargetInfo &STI) const;
00156 
00157 }; // class MipsMCCodeEmitter
00158 } // namespace llvm.
00159 
00160 #endif