LLVM API Documentation
00001 //===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file describes the PowerPC branch predicates. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H 00015 #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H 00016 00017 // GCC #defines PPC on Linux but we use it as our namespace name 00018 #undef PPC 00019 00020 // Generated files will use "namespace PPC". To avoid symbol clash, 00021 // undefine PPC here. PPC may be predefined on some hosts. 00022 #undef PPC 00023 00024 namespace llvm { 00025 namespace PPC { 00026 /// Predicate - These are "(BI << 5) | BO" for various predicates. 00027 enum Predicate { 00028 PRED_LT = (0 << 5) | 12, 00029 PRED_LE = (1 << 5) | 4, 00030 PRED_EQ = (2 << 5) | 12, 00031 PRED_GE = (0 << 5) | 4, 00032 PRED_GT = (1 << 5) | 12, 00033 PRED_NE = (2 << 5) | 4, 00034 PRED_UN = (3 << 5) | 12, 00035 PRED_NU = (3 << 5) | 4, 00036 PRED_LT_MINUS = (0 << 5) | 14, 00037 PRED_LE_MINUS = (1 << 5) | 6, 00038 PRED_EQ_MINUS = (2 << 5) | 14, 00039 PRED_GE_MINUS = (0 << 5) | 6, 00040 PRED_GT_MINUS = (1 << 5) | 14, 00041 PRED_NE_MINUS = (2 << 5) | 6, 00042 PRED_UN_MINUS = (3 << 5) | 14, 00043 PRED_NU_MINUS = (3 << 5) | 6, 00044 PRED_LT_PLUS = (0 << 5) | 15, 00045 PRED_LE_PLUS = (1 << 5) | 7, 00046 PRED_EQ_PLUS = (2 << 5) | 15, 00047 PRED_GE_PLUS = (0 << 5) | 7, 00048 PRED_GT_PLUS = (1 << 5) | 15, 00049 PRED_NE_PLUS = (2 << 5) | 7, 00050 PRED_UN_PLUS = (3 << 5) | 15, 00051 PRED_NU_PLUS = (3 << 5) | 7, 00052 00053 // When dealing with individual condition-register bits, we have simple set 00054 // and unset predicates. 00055 PRED_BIT_SET = 1024, 00056 PRED_BIT_UNSET = 1025 00057 }; 00058 00059 /// Invert the specified predicate. != -> ==, < -> >=. 00060 Predicate InvertPredicate(Predicate Opcode); 00061 00062 /// Assume the condition register is set by MI(a,b), return the predicate if 00063 /// we modify the instructions such that condition register is set by MI(b,a). 00064 Predicate getSwappedPredicate(Predicate Opcode); 00065 } 00066 } 00067 00068 #endif