LLVM API Documentation
00001 //===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 /// \file 00011 /// \brief Interface definition for R600RegisterInfo 00012 // 00013 //===----------------------------------------------------------------------===// 00014 00015 #ifndef LLVM_LIB_TARGET_R600_R600REGISTERINFO_H 00016 #define LLVM_LIB_TARGET_R600_R600REGISTERINFO_H 00017 00018 #include "AMDGPURegisterInfo.h" 00019 00020 namespace llvm { 00021 00022 class AMDGPUSubtarget; 00023 00024 struct R600RegisterInfo : public AMDGPURegisterInfo { 00025 RegClassWeight RCW; 00026 00027 R600RegisterInfo(const AMDGPUSubtarget &st); 00028 00029 BitVector getReservedRegs(const MachineFunction &MF) const override; 00030 00031 /// \brief get the HW encoding for a register's channel. 00032 unsigned getHWRegChan(unsigned reg) const; 00033 00034 unsigned getHWRegIndex(unsigned Reg) const override; 00035 00036 /// \brief get the register class of the specified type to use in the 00037 /// CFGStructurizer 00038 const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const override; 00039 00040 const RegClassWeight & 00041 getRegClassWeight(const TargetRegisterClass *RC) const override; 00042 00043 // \returns true if \p Reg can be defined in one ALU caluse and used in another. 00044 bool isPhysRegLiveAcrossClauses(unsigned Reg) const; 00045 }; 00046 00047 } // End namespace llvm 00048 00049 #endif