LLVM API Documentation

llvm::GenericScheduler Member List
This is the complete list of members for llvm::GenericScheduler, including all inherited members.
BotHeightReduce enum valuellvm::GenericSchedulerBase
BotPathReduce enum valuellvm::GenericSchedulerBase
CandReason enum namellvm::GenericSchedulerBase
checkAcyclicLatency()llvm::GenericScheduler [protected]
Cluster enum valuellvm::GenericSchedulerBase
Contextllvm::GenericSchedulerBase [protected]
GenericScheduler(const MachineSchedContext *C)llvm::GenericScheduler [inline]
GenericSchedulerBase(const MachineSchedContext *C)llvm::GenericSchedulerBase [inline, protected]
getReasonStr(GenericSchedulerBase::CandReason Reason)llvm::GenericSchedulerBase [static]
initialize(ScheduleDAGMI *dag) overridellvm::GenericScheduler [virtual]
initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) overridellvm::GenericScheduler [virtual]
NextDefUse enum valuellvm::GenericSchedulerBase
NoCand enum valuellvm::GenericSchedulerBase
NodeOrder enum valuellvm::GenericSchedulerBase
PhysRegCopy enum valuellvm::GenericSchedulerBase
pickNode(bool &IsTopNode) overridellvm::GenericScheduler [virtual]
pickNodeBidirectional(bool &IsTopNode)llvm::GenericScheduler [protected]
pickNodeFromQueue(SchedBoundary &Zone, const RegPressureTracker &RPTracker, SchedCandidate &Candidate)llvm::GenericScheduler [protected]
RegCritical enum valuellvm::GenericSchedulerBase
RegExcess enum valuellvm::GenericSchedulerBase
registerRoots() overridellvm::GenericScheduler [virtual]
RegMax enum valuellvm::GenericSchedulerBase
releaseBottomNode(SUnit *SU) overridellvm::GenericScheduler [inline, virtual]
releaseTopNode(SUnit *SU) overridellvm::GenericScheduler [inline, virtual]
Remllvm::GenericSchedulerBase [protected]
reschedulePhysRegCopies(SUnit *SU, bool isTop)llvm::GenericScheduler [protected]
ResourceDemand enum valuellvm::GenericSchedulerBase
ResourceReduce enum valuellvm::GenericSchedulerBase
SchedModelllvm::GenericSchedulerBase [protected]
schedNode(SUnit *SU, bool IsTopNode) overridellvm::GenericScheduler [virtual]
scheduleTree(unsigned SubtreeID)llvm::MachineSchedStrategy [inline, virtual]
setPolicy(CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone)llvm::GenericSchedulerBase [protected]
shouldTrackPressure() const overridellvm::GenericScheduler [inline, virtual]
Stall enum valuellvm::GenericSchedulerBase
TopDepthReduce enum valuellvm::GenericSchedulerBase
TopPathReduce enum valuellvm::GenericSchedulerBase
traceCandidate(const SchedCandidate &Cand)llvm::GenericSchedulerBase [protected]
TRIllvm::GenericSchedulerBase [protected]
tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand, SchedBoundary &Zone, const RegPressureTracker &RPTracker, RegPressureTracker &TempTracker)llvm::GenericScheduler [protected]
Weak enum valuellvm::GenericSchedulerBase
~MachineSchedStrategy()llvm::MachineSchedStrategy [inline, virtual]