llvm::MachineInstr Member List

This is the complete list of members for llvm::MachineInstr, including all inherited members.

addMemOperand(MachineFunction &MF, MachineMemOperand *MO)	llvm::MachineInstr
addOperand(MachineFunction &MF, const MachineOperand &Op)	llvm::MachineInstr
addOperand(const MachineOperand &Op)	llvm::MachineInstr
addRegisterDead(unsigned Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)	llvm::MachineInstr
addRegisterDefined(unsigned Reg, const TargetRegisterInfo *RegInfo=nullptr)	llvm::MachineInstr
addRegisterKilled(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)	llvm::MachineInstr
allDefsAreDead() const	llvm::MachineInstr
AllInBundle enum value	llvm::MachineInstr
AnyInBundle enum value	llvm::MachineInstr
BundledPred enum value	llvm::MachineInstr
BundledSucc enum value	llvm::MachineInstr
bundleWithPred()	llvm::MachineInstr
bundleWithSucc()	llvm::MachineInstr
canFoldAsLoad(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
CheckDefs enum value	llvm::MachineInstr
CheckKillDead enum value	llvm::MachineInstr
clearAsmPrinterFlag(CommentFlag Flag)	llvm::MachineInstr	[inline]
clearAsmPrinterFlags()	llvm::MachineInstr	[inline]
clearFlag(MIFlag Flag)	llvm::MachineInstr	[inline]
clearKillInfo()	llvm::MachineInstr
clearRegisterKills(unsigned Reg, const TargetRegisterInfo *RegInfo)	llvm::MachineInstr
CommentFlag enum name	llvm::MachineInstr
const_mop_iterator typedef	llvm::MachineInstr
copyImplicitOps(MachineFunction &MF, const MachineInstr *MI)	llvm::MachineInstr
definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const	llvm::MachineInstr	[inline]
defs()	llvm::MachineInstr	[inline]
defs() const	llvm::MachineInstr	[inline]
dump() const	llvm::MachineInstr
emitError(StringRef Msg) const	llvm::MachineInstr
eraseFromBundle()	llvm::MachineInstr
eraseFromParent()	llvm::MachineInstr
eraseFromParentAndMarkDBGValuesForRemoval()	llvm::MachineInstr
explicit_operands()	llvm::MachineInstr	[inline]
explicit_operands() const	llvm::MachineInstr	[inline]
findFirstPredOperandIdx() const	llvm::MachineInstr
findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo=nullptr) const	llvm::MachineInstr
findRegisterDefOperand(unsigned Reg, bool isDead=false, const TargetRegisterInfo *TRI=nullptr)	llvm::MachineInstr	[inline]
findRegisterDefOperandIdx(unsigned Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const	llvm::MachineInstr
findRegisterUseOperand(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr)	llvm::MachineInstr	[inline]
findRegisterUseOperandIdx(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const	llvm::MachineInstr
findTiedOperandIdx(unsigned OpIdx) const	llvm::MachineInstr
FrameSetup enum value	llvm::MachineInstr
getAsmPrinterFlag(CommentFlag Flag) const	llvm::MachineInstr	[inline]
getAsmPrinterFlags() const	llvm::MachineInstr	[inline]
getBundleSize() const	llvm::MachineInstr
getDebugLoc() const	llvm::MachineInstr	[inline]
getDebugVariable() const	llvm::MachineInstr	[inline]
getDesc() const	llvm::MachineInstr	[inline]
getFlag(MIFlag Flag) const	llvm::MachineInstr	[inline]
getFlags() const	llvm::MachineInstr	[inline]
getInlineAsmDialect() const	llvm::MachineInstr
getNextNode()	llvm::ilist_node< MachineInstr >	[inline]
getNextNode() const	llvm::ilist_node< MachineInstr >	[inline]
getNumExplicitOperands() const	llvm::MachineInstr
getNumOperands() const	llvm::MachineInstr	[inline]
getOpcode() const	llvm::MachineInstr	[inline]
getOperand(unsigned i) const	llvm::MachineInstr	[inline]
getOperand(unsigned i)	llvm::MachineInstr	[inline]
getParent() const	llvm::MachineInstr	[inline]
getParent()	llvm::MachineInstr	[inline]
getPrevNode()	llvm::ilist_node< MachineInstr >	[inline]
getPrevNode() const	llvm::ilist_node< MachineInstr >	[inline]
getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const	llvm::MachineInstr
getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const	llvm::MachineInstr
getRegClassConstraintEffectForVReg(unsigned Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const	llvm::MachineInstr
hasDelaySlot(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
hasExtraDefRegAllocReq(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
hasExtraSrcRegAllocReq(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
hasOneMemOperand() const	llvm::MachineInstr	[inline]
hasOptionalDef(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
hasOrderedMemoryRef() const	llvm::MachineInstr
hasPostISelHook(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
hasProperty(unsigned MCFlag, QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
hasUnmodeledSideEffects() const	llvm::MachineInstr
IgnoreBundle enum value	llvm::MachineInstr
IgnoreDefs enum value	llvm::MachineInstr
IgnoreVRegDefs enum value	llvm::MachineInstr
ilist_node()	llvm::ilist_node< MachineInstr >	[inline, protected]
ilist_traits< MachineBasicBlock >	llvm::MachineInstr	[friend]
ilist_traits< MachineInstr >	llvm::MachineInstr	[friend]
implicit_operands()	llvm::MachineInstr	[inline]
implicit_operands() const	llvm::MachineInstr	[inline]
isAsCheapAsAMove(QueryType Type=AllInBundle) const	llvm::MachineInstr	[inline]
isBarrier(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isBitcast(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isBranch(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isBundle() const	llvm::MachineInstr	[inline]
isBundled() const	llvm::MachineInstr	[inline]
isBundledWithPred() const	llvm::MachineInstr	[inline]
isBundledWithSucc() const	llvm::MachineInstr	[inline]
isCall(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isCFIInstruction() const	llvm::MachineInstr	[inline]
isCommutable(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isCompare(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isConditionalBranch(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isConstantValuePHI() const	llvm::MachineInstr
isConvertibleTo3Addr(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isCopy() const	llvm::MachineInstr	[inline]
isCopyLike() const	llvm::MachineInstr	[inline]
isDebugValue() const	llvm::MachineInstr	[inline]
isEHLabel() const	llvm::MachineInstr	[inline]
isExtractSubreg() const	llvm::MachineInstr	[inline]
isExtractSubregLike(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isFullCopy() const	llvm::MachineInstr	[inline]
isGCLabel() const	llvm::MachineInstr	[inline]
isIdenticalTo(const MachineInstr *Other, MICheckType Check=CheckDefs) const	llvm::MachineInstr
isIdentityCopy() const	llvm::MachineInstr	[inline]
isImplicitDef() const	llvm::MachineInstr	[inline]
isIndirectBranch(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isIndirectDebugValue() const	llvm::MachineInstr	[inline]
isInlineAsm() const	llvm::MachineInstr	[inline]
isInsertSubreg() const	llvm::MachineInstr	[inline]
isInsertSubregLike(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isInsideBundle() const	llvm::MachineInstr	[inline]
isInvariantLoad(AliasAnalysis *AA) const	llvm::MachineInstr
isKill() const	llvm::MachineInstr	[inline]
isLabel() const	llvm::MachineInstr	[inline]
isMoveImmediate(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isMSInlineAsm() const	llvm::MachineInstr	[inline]
isNotDuplicable(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isPHI() const	llvm::MachineInstr	[inline]
isPosition() const	llvm::MachineInstr	[inline]
isPredicable(QueryType Type=AllInBundle) const	llvm::MachineInstr	[inline]
isPseudo(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isRegSequence() const	llvm::MachineInstr	[inline]
isRegSequenceLike(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const	llvm::MachineInstr	[inline]
isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const	llvm::MachineInstr	[inline]
isRematerializable(QueryType Type=AllInBundle) const	llvm::MachineInstr	[inline]
isReturn(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isSafeToMove(const TargetInstrInfo *TII, AliasAnalysis *AA, bool &SawStore) const	llvm::MachineInstr
isSelect(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
isStackAligningInlineAsm() const	llvm::MachineInstr
isSubregToReg() const	llvm::MachineInstr	[inline]
isTerminator(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isTransient() const	llvm::MachineInstr	[inline]
isUnconditionalBranch(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
isVariadic(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]
killsRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const	llvm::MachineInstr	[inline]
MachineFunction class	llvm::MachineInstr	[friend]
mayLoad(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
mayStore(QueryType Type=AnyInBundle) const	llvm::MachineInstr	[inline]
memoperands()	llvm::MachineInstr	[inline]
memoperands() const	llvm::MachineInstr	[inline]
memoperands_begin() const	llvm::MachineInstr	[inline]
memoperands_empty() const	llvm::MachineInstr	[inline]
memoperands_end() const	llvm::MachineInstr	[inline]
MICheckType enum name	llvm::MachineInstr
MIFlag enum name	llvm::MachineInstr
mmo_iterator typedef	llvm::MachineInstr
modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const	llvm::MachineInstr	[inline]
mop_iterator typedef	llvm::MachineInstr
NoFlags enum value	llvm::MachineInstr
operands()	llvm::MachineInstr	[inline]
operands() const	llvm::MachineInstr	[inline]
operands_begin()	llvm::MachineInstr	[inline]
operands_begin() const	llvm::MachineInstr	[inline]
operands_end()	llvm::MachineInstr	[inline]
operands_end() const	llvm::MachineInstr	[inline]
print(raw_ostream &OS, const TargetMachine *TM=nullptr, bool SkipOpers=false) const	llvm::MachineInstr
QueryType enum name	llvm::MachineInstr
readsRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const	llvm::MachineInstr	[inline]
readsVirtualRegister(unsigned Reg) const	llvm::MachineInstr	[inline]
readsWritesVirtualRegister(unsigned Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const	llvm::MachineInstr
registerDefIsDead(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const	llvm::MachineInstr	[inline]
ReloadReuse enum value	llvm::MachineInstr
removeFromBundle()	llvm::MachineInstr
removeFromParent()	llvm::MachineInstr
RemoveOperand(unsigned i)	llvm::MachineInstr
setAsmPrinterFlag(CommentFlag Flag)	llvm::MachineInstr	[inline]
setDebugLoc(const DebugLoc dl)	llvm::MachineInstr	[inline]
setDesc(const MCInstrDesc &tid)	llvm::MachineInstr	[inline]
setFlag(MIFlag Flag)	llvm::MachineInstr	[inline]
setFlags(unsigned flags)	llvm::MachineInstr	[inline]
setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd)	llvm::MachineInstr	[inline]
setPhysRegsDeadExcept(ArrayRef< unsigned > UsedRegs, const TargetRegisterInfo &TRI)	llvm::MachineInstr
substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)	llvm::MachineInstr
tieOperands(unsigned DefIdx, unsigned UseIdx)	llvm::MachineInstr
unbundleFromPred()	llvm::MachineInstr
unbundleFromSucc()	llvm::MachineInstr
uses()	llvm::MachineInstr	[inline]
uses() const	llvm::MachineInstr	[inline]
usesCustomInsertionHook(QueryType Type=IgnoreBundle) const	llvm::MachineInstr	[inline]