, including all inherited members.
BotHeightReduce enum value | llvm::GenericSchedulerBase | |
BotPathReduce enum value | llvm::GenericSchedulerBase | |
CandReason enum name | llvm::GenericSchedulerBase | |
Cluster enum value | llvm::GenericSchedulerBase | |
Context | llvm::GenericSchedulerBase | [protected] |
GenericSchedulerBase(const MachineSchedContext *C) | llvm::GenericSchedulerBase | [inline, protected] |
getReasonStr(GenericSchedulerBase::CandReason Reason) | llvm::GenericSchedulerBase | [static] |
initialize(ScheduleDAGMI *Dag) override | llvm::PostGenericScheduler | [virtual] |
initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override | llvm::PostGenericScheduler | [inline, virtual] |
NextDefUse enum value | llvm::GenericSchedulerBase | |
NoCand enum value | llvm::GenericSchedulerBase | |
NodeOrder enum value | llvm::GenericSchedulerBase | |
PhysRegCopy enum value | llvm::GenericSchedulerBase | |
pickNode(bool &IsTopNode) override | llvm::PostGenericScheduler | [virtual] |
pickNodeFromQueue(SchedCandidate &Cand) | llvm::PostGenericScheduler | [protected] |
PostGenericScheduler(const MachineSchedContext *C) | llvm::PostGenericScheduler | [inline] |
RegCritical enum value | llvm::GenericSchedulerBase | |
RegExcess enum value | llvm::GenericSchedulerBase | |
registerRoots() override | llvm::PostGenericScheduler | [virtual] |
RegMax enum value | llvm::GenericSchedulerBase | |
releaseBottomNode(SUnit *SU) override | llvm::PostGenericScheduler | [inline, virtual] |
releaseTopNode(SUnit *SU) override | llvm::PostGenericScheduler | [inline, virtual] |
Rem | llvm::GenericSchedulerBase | [protected] |
ResourceDemand enum value | llvm::GenericSchedulerBase | |
ResourceReduce enum value | llvm::GenericSchedulerBase | |
SchedModel | llvm::GenericSchedulerBase | [protected] |
schedNode(SUnit *SU, bool IsTopNode) override | llvm::PostGenericScheduler | [virtual] |
scheduleTree(unsigned SubtreeID) override | llvm::PostGenericScheduler | [inline, virtual] |
setPolicy(CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone) | llvm::GenericSchedulerBase | [protected] |
shouldTrackPressure() const override | llvm::PostGenericScheduler | [inline, virtual] |
Stall enum value | llvm::GenericSchedulerBase | |
TopDepthReduce enum value | llvm::GenericSchedulerBase | |
TopPathReduce enum value | llvm::GenericSchedulerBase | |
traceCandidate(const SchedCandidate &Cand) | llvm::GenericSchedulerBase | [protected] |
TRI | llvm::GenericSchedulerBase | [protected] |
tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand) | llvm::PostGenericScheduler | [protected] |
Weak enum value | llvm::GenericSchedulerBase | |
~MachineSchedStrategy() | llvm::MachineSchedStrategy | [inline, virtual] |
~PostGenericScheduler() | llvm::PostGenericScheduler | [inline, virtual] |