LLVM API Documentation

llvm::SystemZInstrInfo Member List
This is the complete list of members for llvm::SystemZInstrInfo, including all inherited members.
AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const overridellvm::SystemZInstrInfo
analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const overridellvm::SystemZInstrInfo
convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const overridellvm::SystemZInstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const overridellvm::SystemZInstrInfo
expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const overridellvm::SystemZInstrInfo
foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, const SmallVectorImpl< unsigned > &Ops, int FrameIndex) const overridellvm::SystemZInstrInfo
foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, const SmallVectorImpl< unsigned > &Ops, MachineInstr *LoadMI) const overridellvm::SystemZInstrInfo
getBranchInfo(const MachineInstr *MI) const llvm::SystemZInstrInfo
getCompareAndBranch(unsigned Opcode, const MachineInstr *MI=nullptr) const llvm::SystemZInstrInfo
getInstSizeInBytes(const MachineInstr *MI) const llvm::SystemZInstrInfo
getLoadAndTest(unsigned Opcode) const llvm::SystemZInstrInfo
getLoadStoreOpcodes(const TargetRegisterClass *RC, unsigned &LoadOpcode, unsigned &StoreOpcode) const llvm::SystemZInstrInfo
getOpcodeForOffset(unsigned Opcode, int64_t Offset) const llvm::SystemZInstrInfo
getRegisterInfo() const llvm::SystemZInstrInfo [inline]
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const overridellvm::SystemZInstrInfo
isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const overridellvm::SystemZInstrInfo
isPredicable(MachineInstr *MI) const overridellvm::SystemZInstrInfo
isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const overridellvm::SystemZInstrInfo
isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumCyclesT, unsigned ExtraPredCyclesT, MachineBasicBlock &FMBB, unsigned NumCyclesF, unsigned ExtraPredCyclesF, const BranchProbability &Probability) const overridellvm::SystemZInstrInfo
isRxSBGMask(uint64_t Mask, unsigned BitSize, unsigned &Start, unsigned &End) const llvm::SystemZInstrInfo
isStackSlotCopy(const MachineInstr *MI, int &DestFrameIndex, int &SrcFrameIndex) const overridellvm::SystemZInstrInfo
isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const overridellvm::SystemZInstrInfo
loadImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned Reg, uint64_t Value) const llvm::SystemZInstrInfo
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const overridellvm::SystemZInstrInfo
optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const overridellvm::SystemZInstrInfo
PredicateInstruction(MachineInstr *MI, const SmallVectorImpl< MachineOperand > &Pred) const overridellvm::SystemZInstrInfo
RemoveBranch(MachineBasicBlock &MBB) const overridellvm::SystemZInstrInfo
ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const overridellvm::SystemZInstrInfo
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const overridellvm::SystemZInstrInfo
SystemZInstrInfo(SystemZSubtarget &STI)llvm::SystemZInstrInfo [explicit]