, including all inherited members.
| addBlockPlacement() | llvm::TargetPassConfig | [protected, virtual] |
| addCodeGenPrepare() | llvm::TargetPassConfig | [virtual] |
| addFastRegAlloc(FunctionPass *RegAllocPass) | llvm::TargetPassConfig | [protected, virtual] |
| addGCPasses() | llvm::TargetPassConfig | [protected, virtual] |
| addILPOpts() | llvm::TargetPassConfig | [inline, protected, virtual] |
| addInstSelector() | llvm::TargetPassConfig | [inline, virtual] |
| addIRPasses() | llvm::TargetPassConfig | [virtual] |
| addISelPrepare() | llvm::TargetPassConfig | [virtual] |
| addMachineLateOptimization() | llvm::TargetPassConfig | [protected, virtual] |
| addMachinePasses() | llvm::TargetPassConfig | [virtual] |
| addMachineSSAOptimization() | llvm::TargetPassConfig | [protected, virtual] |
| addOptimizedRegAlloc(FunctionPass *RegAllocPass) | llvm::TargetPassConfig | [protected, virtual] |
| addPass(AnalysisID PassID) | llvm::TargetPassConfig | [protected] |
| addPass(Pass *P) | llvm::TargetPassConfig | [protected] |
| addPassesToHandleExceptions() | llvm::TargetPassConfig | |
| addPostRegAlloc() | llvm::TargetPassConfig | [inline, protected, virtual] |
| addPreEmitPass() | llvm::TargetPassConfig | [inline, protected, virtual] |
| addPreISel() | llvm::TargetPassConfig | [inline, protected, virtual] |
| addPreRegAlloc() | llvm::TargetPassConfig | [inline, protected, virtual] |
| addPreRewrite() | llvm::TargetPassConfig | [inline, protected, virtual] |
| addPreSched2() | llvm::TargetPassConfig | [inline, protected, virtual] |
| assignPassManager(PMStack &PMS, PassManagerType T) override | llvm::ModulePass | [virtual] |
| createMachineScheduler(MachineSchedContext *C) const | llvm::TargetPassConfig | [inline, virtual] |
| createPass(AnalysisID ID) | llvm::Pass | [static] |
| createPostMachineScheduler(MachineSchedContext *C) const | llvm::TargetPassConfig | [inline, virtual] |
| createPrinterPass(raw_ostream &O, const std::string &Banner) const override | llvm::ModulePass | [virtual] |
| createRegAllocPass(bool Optimized) | llvm::TargetPassConfig | [protected] |
| createTargetRegisterAllocator(bool Optimized) | llvm::TargetPassConfig | [protected, virtual] |
| disablePass(AnalysisID PassID) | llvm::TargetPassConfig | [inline] |
| DisableVerify | llvm::TargetPassConfig | [protected] |
| doFinalization(Module &) | llvm::Pass | [inline, virtual] |
| doInitialization(Module &) | llvm::Pass | [inline, virtual] |
| dump() const | llvm::Pass | |
| dumpPassStructure(unsigned Offset=0) | llvm::Pass | [virtual] |
| EarlyTailDuplicateID | llvm::TargetPassConfig | [static] |
| enablePass(AnalysisID PassID) | llvm::TargetPassConfig | [inline] |
| EnableTailMerge | llvm::TargetPassConfig | [protected] |
| getAdjustedAnalysisPointer(AnalysisID ID) | llvm::Pass | [virtual] |
| getAnalysis() const | llvm::Pass | |
| getAnalysis(Function &F) | llvm::Pass | |
| getAnalysisID(AnalysisID PI) const | llvm::Pass | |
| getAnalysisID(AnalysisID PI, Function &F) | llvm::Pass | |
| getAnalysisIfAvailable() const | llvm::Pass | |
| getAnalysisUsage(AnalysisUsage &) const | llvm::Pass | [virtual] |
| getAsImmutablePass() override | llvm::ImmutablePass | [inline, virtual] |
| getAsPMDataManager() | llvm::Pass | [virtual] |
| getEnableTailMerge() const | llvm::TargetPassConfig | [inline] |
| getOptimizeRegAlloc() const | llvm::TargetPassConfig | |
| getOptLevel() const | llvm::TargetPassConfig | [inline] |
| getPassID() const | llvm::Pass | [inline] |
| getPassKind() const | llvm::Pass | [inline] |
| getPassName() const | llvm::Pass | [virtual] |
| getPassSubstitution(AnalysisID StandardID) const | llvm::TargetPassConfig | |
| getPotentialPassManagerType() const override | llvm::ModulePass | [virtual] |
| getResolver() const | llvm::Pass | [inline] |
| getTM() const | llvm::TargetPassConfig | [inline] |
| ID | llvm::TargetPassConfig | [static] |
| ImmutablePass(char &pid) | llvm::ImmutablePass | [inline, explicit] |
| Impl | llvm::TargetPassConfig | [protected] |
| Initialized | llvm::TargetPassConfig | [protected] |
| initializePass() | llvm::ImmutablePass | [virtual] |
| insertPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID) | llvm::TargetPassConfig | |
| lookupPassInfo(const void *TI) | llvm::Pass | [static] |
| lookupPassInfo(StringRef Arg) | llvm::Pass | [static] |
| ModulePass(char &pid) | llvm::ModulePass | [inline, explicit] |
| mustPreserveAnalysisID(char &AID) const | llvm::Pass | |
| Pass(PassKind K, char &pid) | llvm::Pass | [inline, explicit] |
| PostRAMachineLICMID | llvm::TargetPassConfig | [static] |
| preparePassManager(PMStack &) | llvm::Pass | [virtual] |
| print(raw_ostream &O, const Module *M) const | llvm::Pass | [virtual] |
| printAndVerify(const char *Banner) | llvm::TargetPassConfig | [protected] |
| releaseMemory() | llvm::Pass | [virtual] |
| runOnModule(Module &) override | llvm::ImmutablePass | [inline, virtual] |
| setDisableVerify(bool Disable) | llvm::TargetPassConfig | [inline] |
| setEnableTailMerge(bool Enable) | llvm::TargetPassConfig | [inline] |
| setInitialized() | llvm::TargetPassConfig | [inline] |
| setOpt(bool &Opt, bool Val) | llvm::TargetPassConfig | [protected] |
| setResolver(AnalysisResolver *AR) | llvm::Pass | |
| setStartStopPasses(AnalysisID Start, AnalysisID Stop) | llvm::TargetPassConfig | [inline] |
| substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID) | llvm::TargetPassConfig | |
| TargetPassConfig(TargetMachine *tm, PassManagerBase &pm) | llvm::TargetPassConfig | |
| TargetPassConfig() | llvm::TargetPassConfig | |
| TM | llvm::TargetPassConfig | [protected] |
| verifyAnalysis() const | llvm::Pass | [virtual] |
| ~ImmutablePass() | llvm::ImmutablePass | [virtual] |
| ~ModulePass() | llvm::ModulePass | [virtual] |
| ~Pass() | llvm::Pass | [virtual] |
| ~TargetPassConfig() | llvm::TargetPassConfig | [virtual] |
1.7.6.1