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Data Structures | Macros
a100u2w.h File Reference

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Data Structures

struct  orc_sgent
 
struct  orc_extended_scb
 
struct  orc_scb
 
struct  orc_target
 
struct  orc_host
 
struct  orc_nvram
 

Macros

#define inia100_REVID   "Initio INI-A100U2W SCSI device driver; Revision: 1.02d"
 
#define ORC_MAXQUEUE   245
 
#define ORC_MAXTAGS   64
 
#define TOTAL_SG_ENTRY   32
 
#define MAX_TARGETS   16
 
#define IMAX_CDB   15
 
#define SENSE_SIZE   14
 
#define DISC_NOT_ALLOW   0x80 /* Disconnect is not allowed */
 
#define DISC_ALLOW   0xC0 /* Disconnect is allowed */
 
#define ORC_OFFSET_SCB   16
 
#define ORC_MAX_SCBS   250
 
#define MAX_CHANNELS   2
 
#define MAX_ESCB_ELE   64
 
#define TCF_DRV_255_63   0x0400
 
#define ORC_CMD_NOP   0x00 /* Host command - NOP */
 
#define ORC_CMD_VERSION   0x01 /* Host command - Get F/W version */
 
#define ORC_CMD_ECHO   0x02 /* Host command - ECHO */
 
#define ORC_CMD_SET_NVM   0x03 /* Host command - Set NVRAM */
 
#define ORC_CMD_GET_NVM   0x04 /* Host command - Get NVRAM */
 
#define ORC_CMD_GET_BUS_STATUS   0x05 /* Host command - Get SCSI bus status */
 
#define ORC_CMD_ABORT_SCB   0x06 /* Host command - Abort SCB */
 
#define ORC_CMD_ISSUE_SCB   0x07 /* Host command - Issue SCB */
 
#define ORC_GINTS   0xA0 /* Global Interrupt Status */
 
#define QINT   0x04 /* Reply Queue Interrupt */
 
#define ORC_GIMSK   0xA1 /* Global Interrupt MASK */
 
#define MQINT   0x04 /* Mask Reply Queue Interrupt */
 
#define ORC_GCFG   0xA2 /* Global Configure */
 
#define EEPRG   0x01 /* Enable EEPROM programming */
 
#define ORC_GSTAT   0xA3 /* Global status */
 
#define WIDEBUS   0x10 /* Wide SCSI Devices connected */
 
#define ORC_HDATA   0xA4 /* Host Data */
 
#define ORC_HCTRL   0xA5 /* Host Control */
 
#define SCSIRST   0x80 /* SCSI bus reset */
 
#define HDO   0x40 /* Host data out */
 
#define HOSTSTOP   0x02 /* Host stop RISC engine */
 
#define DEVRST   0x01 /* Device reset */
 
#define ORC_HSTUS   0xA6 /* Host Status */
 
#define HDI   0x02 /* Host data in */
 
#define RREADY   0x01 /* RISC engine is ready to receive */
 
#define ORC_NVRAM   0xA7 /* Nvram port address */
 
#define SE2CS   0x008
 
#define SE2CLK   0x004
 
#define SE2DO   0x002
 
#define SE2DI   0x001
 
#define ORC_PQUEUE   0xA8 /* Posting queue FIFO */
 
#define ORC_PQCNT   0xA9 /* Posting queue FIFO Cnt */
 
#define ORC_RQUEUE   0xAA /* Reply queue FIFO */
 
#define ORC_RQUEUECNT   0xAB /* Reply queue FIFO Cnt */
 
#define ORC_FWBASEADR   0xAC /* Firmware base address */
 
#define ORC_EBIOSADR0   0xB0 /* External Bios address */
 
#define ORC_EBIOSADR1   0xB1 /* External Bios address */
 
#define ORC_EBIOSADR2   0xB2 /* External Bios address */
 
#define ORC_EBIOSDATA   0xB3 /* External Bios address */
 
#define ORC_SCBSIZE   0xB7 /* SCB size register */
 
#define ORC_SCBBASE0   0xB8 /* SCB base address 0 */
 
#define ORC_SCBBASE1   0xBC /* SCB base address 1 */
 
#define ORC_RISCCTL   0xE0 /* RISC Control */
 
#define PRGMRST   0x002
 
#define DOWNLOAD   0x001
 
#define ORC_PRGMCTR0   0xE2 /* RISC program counter */
 
#define ORC_PRGMCTR1   0xE3 /* RISC program counter */
 
#define ORC_RISCRAM   0xEC /* RISC RAM data port 4 bytes */
 
#define ORC_EXECSCSI   0x00 /* SCSI initiator command with residual */
 
#define ORC_BUSDEVRST   0x01 /* SCSI Bus Device Reset */
 
#define ORCSCB_COMPLETE   0x00 /* SCB request completed */
 
#define ORCSCB_POST   0x01 /* SCB is posted by the HOST */
 
#define SCF_DISINT   0x01 /* Disable HOST interrupt */
 
#define SCF_DIR   0x18 /* Direction bits */
 
#define SCF_NO_DCHK   0x00 /* Direction determined by SCSI */
 
#define SCF_DIN   0x08 /* From Target to Initiator */
 
#define SCF_DOUT   0x10 /* From Initiator to Target */
 
#define SCF_NO_XF   0x18 /* No data transfer */
 
#define SCF_POLL   0x40
 
#define HOST_SEL_TOUT   0x11
 
#define HOST_DO_DU   0x12
 
#define HOST_BUS_FREE   0x13
 
#define HOST_BAD_PHAS   0x14
 
#define HOST_INV_CMD   0x16
 
#define HOST_SCSI_RST   0x1B
 
#define HOST_DEV_RST   0x1C
 
#define TARGET_CHK_COND   0x02
 
#define TARGET_BUSY   0x08
 
#define TARGET_TAG_FULL   0x28
 
#define TCS_DF_NODASD_SUPT   0x20 /* Suppress OS/2 DASD Mgr support */
 
#define TCS_DF_NOSCSI_SUPT   0x40 /* Suppress OS/2 SCSI Mgr support */
 
#define HCF_SCSI_RESET   0x01 /* SCSI BUS RESET */
 
#define HCF_PARITY   0x02 /* parity card */
 
#define HCF_LVDS   0x10 /* parity card */
 
#define TCF_EN_255   0x08
 
#define TCF_EN_TAG   0x10
 
#define TCF_BUSY   0x20
 
#define TCF_DISCONNECT   0x40
 
#define TCF_SPIN_UP   0x80
 
#define HCS_AF_IGNORE   0x01 /* Adapter ignore */
 
#define HCS_AF_DISABLE_RESET   0x10 /* Adapter disable reset */
 
#define HCS_AF_DISABLE_ADPT   0x80 /* Adapter disable */
 
#define NBC_BIOSENABLE   0x01 /* BIOS enable */
 
#define NBC_CDROM   0x02 /* Support bootable CDROM */
 
#define NBC_REMOVABLE   0x04 /* Support removable drive */
 
#define NBB_TARGET_MASK   0x0F /* Boot SCSI target ID number */
 
#define NBB_CHANL_MASK   0xF0 /* Boot SCSI channel number */
 
#define NCC_BUSRESET   0x01 /* Reset SCSI bus at power up */
 
#define NCC_PARITYCHK   0x02 /* SCSI parity enable */
 
#define NCC_LVDS   0x10 /* Enable LVDS */
 
#define NCC_ACTTERM1   0x20 /* Enable active terminator 1 */
 
#define NCC_ACTTERM2   0x40 /* Enable active terminator 2 */
 
#define NCC_AUTOTERM   0x80 /* Enable auto termination */
 
#define NTC_PERIOD   0x07 /* Maximum Sync. Speed */
 
#define NTC_1GIGA   0x08 /* 255 head / 63 sectors (64/32) */
 
#define NTC_NO_SYNC   0x10 /* NO SYNC. NEGO */
 
#define NTC_NO_WIDESYNC   0x20 /* NO WIDE SYNC. NEGO */
 
#define NTC_DISC_ENABLE   0x40 /* Enable SCSI disconnect */
 
#define NTC_SPINUP   0x80 /* Start disk drive */
 
#define NBC_DEFAULT   (NBC_ENABLE)
 
#define NCC_DEFAULT   (NCC_BUSRESET | NCC_AUTOTERM | NCC_PARITYCHK)
 
#define NCC_MAX_TAGS   0x20 /* Maximum tags per target */
 
#define NCC_RESET_TIME   0x0A /* SCSI RESET recovering time */
 
#define NTC_DEFAULT   (NTC_1GIGA | NTC_NO_WIDESYNC | NTC_DISC_ENABLE)
 

Macro Definition Documentation

#define DEVRST   0x01 /* Device reset */

Definition at line 105 of file a100u2w.h.

#define DISC_ALLOW   0xC0 /* Disconnect is allowed */

Definition at line 68 of file a100u2w.h.

#define DISC_NOT_ALLOW   0x80 /* Disconnect is not allowed */

Definition at line 67 of file a100u2w.h.

#define DOWNLOAD   0x001

Definition at line 131 of file a100u2w.h.

#define EEPRG   0x01 /* Enable EEPROM programming */

Definition at line 97 of file a100u2w.h.

#define HCF_LVDS   0x10 /* parity card */

Definition at line 251 of file a100u2w.h.

#define HCF_PARITY   0x02 /* parity card */

Definition at line 250 of file a100u2w.h.

#define HCF_SCSI_RESET   0x01 /* SCSI BUS RESET */

Definition at line 249 of file a100u2w.h.

#define HCS_AF_DISABLE_ADPT   0x80 /* Adapter disable */

Definition at line 264 of file a100u2w.h.

#define HCS_AF_DISABLE_RESET   0x10 /* Adapter disable reset */

Definition at line 263 of file a100u2w.h.

#define HCS_AF_IGNORE   0x01 /* Adapter ignore */

Definition at line 262 of file a100u2w.h.

#define HDI   0x02 /* Host data in */

Definition at line 107 of file a100u2w.h.

#define HDO   0x40 /* Host data out */

Definition at line 103 of file a100u2w.h.

#define HOST_BAD_PHAS   0x14

Definition at line 197 of file a100u2w.h.

#define HOST_BUS_FREE   0x13

Definition at line 196 of file a100u2w.h.

#define HOST_DEV_RST   0x1C

Definition at line 200 of file a100u2w.h.

#define HOST_DO_DU   0x12

Definition at line 195 of file a100u2w.h.

#define HOST_INV_CMD   0x16

Definition at line 198 of file a100u2w.h.

#define HOST_SCSI_RST   0x1B

Definition at line 199 of file a100u2w.h.

#define HOST_SEL_TOUT   0x11

Definition at line 194 of file a100u2w.h.

#define HOSTSTOP   0x02 /* Host stop RISC engine */

Definition at line 104 of file a100u2w.h.

#define IMAX_CDB   15

Definition at line 55 of file a100u2w.h.

#define inia100_REVID   "Initio INI-A100U2W SCSI device driver; Revision: 1.02d"

Definition at line 43 of file a100u2w.h.

#define MAX_CHANNELS   2

Definition at line 73 of file a100u2w.h.

#define MAX_ESCB_ELE   64

Definition at line 74 of file a100u2w.h.

#define MAX_TARGETS   16

Definition at line 54 of file a100u2w.h.

#define MQINT   0x04 /* Mask Reply Queue Interrupt */

Definition at line 95 of file a100u2w.h.

#define NBB_CHANL_MASK   0xF0 /* Boot SCSI channel number */

Definition at line 347 of file a100u2w.h.

#define NBB_TARGET_MASK   0x0F /* Boot SCSI target ID number */

Definition at line 346 of file a100u2w.h.

#define NBC_BIOSENABLE   0x01 /* BIOS enable */

Definition at line 341 of file a100u2w.h.

#define NBC_CDROM   0x02 /* Support bootable CDROM */

Definition at line 342 of file a100u2w.h.

#define NBC_DEFAULT   (NBC_ENABLE)

Definition at line 366 of file a100u2w.h.

#define NBC_REMOVABLE   0x04 /* Support removable drive */

Definition at line 343 of file a100u2w.h.

#define NCC_ACTTERM1   0x20 /* Enable active terminator 1 */

Definition at line 353 of file a100u2w.h.

#define NCC_ACTTERM2   0x40 /* Enable active terminator 2 */

Definition at line 354 of file a100u2w.h.

#define NCC_AUTOTERM   0x80 /* Enable auto termination */

Definition at line 355 of file a100u2w.h.

#define NCC_BUSRESET   0x01 /* Reset SCSI bus at power up */

Definition at line 350 of file a100u2w.h.

#define NCC_DEFAULT   (NCC_BUSRESET | NCC_AUTOTERM | NCC_PARITYCHK)

Definition at line 367 of file a100u2w.h.

#define NCC_LVDS   0x10 /* Enable LVDS */

Definition at line 352 of file a100u2w.h.

#define NCC_MAX_TAGS   0x20 /* Maximum tags per target */

Definition at line 368 of file a100u2w.h.

#define NCC_PARITYCHK   0x02 /* SCSI parity enable */

Definition at line 351 of file a100u2w.h.

#define NCC_RESET_TIME   0x0A /* SCSI RESET recovering time */

Definition at line 369 of file a100u2w.h.

#define NTC_1GIGA   0x08 /* 255 head / 63 sectors (64/32) */

Definition at line 359 of file a100u2w.h.

#define NTC_DEFAULT   (NTC_1GIGA | NTC_NO_WIDESYNC | NTC_DISC_ENABLE)

Definition at line 370 of file a100u2w.h.

#define NTC_DISC_ENABLE   0x40 /* Enable SCSI disconnect */

Definition at line 362 of file a100u2w.h.

#define NTC_NO_SYNC   0x10 /* NO SYNC. NEGO */

Definition at line 360 of file a100u2w.h.

#define NTC_NO_WIDESYNC   0x20 /* NO WIDE SYNC. NEGO */

Definition at line 361 of file a100u2w.h.

#define NTC_PERIOD   0x07 /* Maximum Sync. Speed */

Definition at line 358 of file a100u2w.h.

#define NTC_SPINUP   0x80 /* Start disk drive */

Definition at line 363 of file a100u2w.h.

#define ORC_BUSDEVRST   0x01 /* SCSI Bus Device Reset */

Definition at line 178 of file a100u2w.h.

#define ORC_CMD_ABORT_SCB   0x06 /* Host command - Abort SCB */

Definition at line 86 of file a100u2w.h.

#define ORC_CMD_ECHO   0x02 /* Host command - ECHO */

Definition at line 82 of file a100u2w.h.

#define ORC_CMD_GET_BUS_STATUS   0x05 /* Host command - Get SCSI bus status */

Definition at line 85 of file a100u2w.h.

#define ORC_CMD_GET_NVM   0x04 /* Host command - Get NVRAM */

Definition at line 84 of file a100u2w.h.

#define ORC_CMD_ISSUE_SCB   0x07 /* Host command - Issue SCB */

Definition at line 87 of file a100u2w.h.

#define ORC_CMD_NOP   0x00 /* Host command - NOP */

Definition at line 80 of file a100u2w.h.

#define ORC_CMD_SET_NVM   0x03 /* Host command - Set NVRAM */

Definition at line 83 of file a100u2w.h.

#define ORC_CMD_VERSION   0x01 /* Host command - Get F/W version */

Definition at line 81 of file a100u2w.h.

#define ORC_EBIOSADR0   0xB0 /* External Bios address */

Definition at line 120 of file a100u2w.h.

#define ORC_EBIOSADR1   0xB1 /* External Bios address */

Definition at line 121 of file a100u2w.h.

#define ORC_EBIOSADR2   0xB2 /* External Bios address */

Definition at line 122 of file a100u2w.h.

#define ORC_EBIOSDATA   0xB3 /* External Bios address */

Definition at line 123 of file a100u2w.h.

#define ORC_EXECSCSI   0x00 /* SCSI initiator command with residual */

Definition at line 177 of file a100u2w.h.

#define ORC_FWBASEADR   0xAC /* Firmware base address */

Definition at line 118 of file a100u2w.h.

#define ORC_GCFG   0xA2 /* Global Configure */

Definition at line 96 of file a100u2w.h.

#define ORC_GIMSK   0xA1 /* Global Interrupt MASK */

Definition at line 94 of file a100u2w.h.

#define ORC_GINTS   0xA0 /* Global Interrupt Status */

Definition at line 92 of file a100u2w.h.

#define ORC_GSTAT   0xA3 /* Global status */

Definition at line 98 of file a100u2w.h.

#define ORC_HCTRL   0xA5 /* Host Control */

Definition at line 101 of file a100u2w.h.

#define ORC_HDATA   0xA4 /* Host Data */

Definition at line 100 of file a100u2w.h.

#define ORC_HSTUS   0xA6 /* Host Status */

Definition at line 106 of file a100u2w.h.

#define ORC_MAX_SCBS   250

Definition at line 72 of file a100u2w.h.

#define ORC_MAXQUEUE   245

Definition at line 46 of file a100u2w.h.

#define ORC_MAXTAGS   64

Definition at line 47 of file a100u2w.h.

#define ORC_NVRAM   0xA7 /* Nvram port address */

Definition at line 109 of file a100u2w.h.

#define ORC_OFFSET_SCB   16

Definition at line 71 of file a100u2w.h.

#define ORC_PQCNT   0xA9 /* Posting queue FIFO Cnt */

Definition at line 115 of file a100u2w.h.

#define ORC_PQUEUE   0xA8 /* Posting queue FIFO */

Definition at line 114 of file a100u2w.h.

#define ORC_PRGMCTR0   0xE2 /* RISC program counter */

Definition at line 132 of file a100u2w.h.

#define ORC_PRGMCTR1   0xE3 /* RISC program counter */

Definition at line 133 of file a100u2w.h.

#define ORC_RISCCTL   0xE0 /* RISC Control */

Definition at line 129 of file a100u2w.h.

#define ORC_RISCRAM   0xEC /* RISC RAM data port 4 bytes */

Definition at line 134 of file a100u2w.h.

#define ORC_RQUEUE   0xAA /* Reply queue FIFO */

Definition at line 116 of file a100u2w.h.

#define ORC_RQUEUECNT   0xAB /* Reply queue FIFO Cnt */

Definition at line 117 of file a100u2w.h.

#define ORC_SCBBASE0   0xB8 /* SCB base address 0 */

Definition at line 126 of file a100u2w.h.

#define ORC_SCBBASE1   0xBC /* SCB base address 1 */

Definition at line 127 of file a100u2w.h.

#define ORC_SCBSIZE   0xB7 /* SCB size register */

Definition at line 125 of file a100u2w.h.

#define ORCSCB_COMPLETE   0x00 /* SCB request completed */

Definition at line 181 of file a100u2w.h.

#define ORCSCB_POST   0x01 /* SCB is posted by the HOST */

Definition at line 182 of file a100u2w.h.

#define PRGMRST   0x002

Definition at line 130 of file a100u2w.h.

#define QINT   0x04 /* Reply Queue Interrupt */

Definition at line 93 of file a100u2w.h.

#define RREADY   0x01 /* RISC engine is ready to receive */

Definition at line 108 of file a100u2w.h.

#define SCF_DIN   0x08 /* From Target to Initiator */

Definition at line 188 of file a100u2w.h.

#define SCF_DIR   0x18 /* Direction bits */

Definition at line 186 of file a100u2w.h.

#define SCF_DISINT   0x01 /* Disable HOST interrupt */

Definition at line 185 of file a100u2w.h.

#define SCF_DOUT   0x10 /* From Initiator to Target */

Definition at line 189 of file a100u2w.h.

#define SCF_NO_DCHK   0x00 /* Direction determined by SCSI */

Definition at line 187 of file a100u2w.h.

#define SCF_NO_XF   0x18 /* No data transfer */

Definition at line 190 of file a100u2w.h.

#define SCF_POLL   0x40

Definition at line 191 of file a100u2w.h.

#define SCSIRST   0x80 /* SCSI bus reset */

Definition at line 102 of file a100u2w.h.

#define SE2CLK   0x004

Definition at line 111 of file a100u2w.h.

#define SE2CS   0x008

Definition at line 110 of file a100u2w.h.

#define SE2DI   0x001

Definition at line 113 of file a100u2w.h.

#define SE2DO   0x002

Definition at line 112 of file a100u2w.h.

#define SENSE_SIZE   14

Definition at line 56 of file a100u2w.h.

#define TARGET_BUSY   0x08

Definition at line 205 of file a100u2w.h.

#define TARGET_CHK_COND   0x02

Definition at line 204 of file a100u2w.h.

#define TARGET_TAG_FULL   0x28

Definition at line 206 of file a100u2w.h.

#define TCF_BUSY   0x20

Definition at line 257 of file a100u2w.h.

#define TCF_DISCONNECT   0x40

Definition at line 258 of file a100u2w.h.

#define TCF_DRV_255_63   0x0400

Definition at line 75 of file a100u2w.h.

#define TCF_EN_255   0x08

Definition at line 255 of file a100u2w.h.

#define TCF_EN_TAG   0x10

Definition at line 256 of file a100u2w.h.

#define TCF_SPIN_UP   0x80

Definition at line 259 of file a100u2w.h.

#define TCS_DF_NODASD_SUPT   0x20 /* Suppress OS/2 DASD Mgr support */

Definition at line 222 of file a100u2w.h.

#define TCS_DF_NOSCSI_SUPT   0x40 /* Suppress OS/2 SCSI Mgr support */

Definition at line 223 of file a100u2w.h.

#define TOTAL_SG_ENTRY   32

Definition at line 53 of file a100u2w.h.

#define WIDEBUS   0x10 /* Wide SCSI Devices connected */

Definition at line 99 of file a100u2w.h.