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#define | ADAV80X_PLAYBACK_CTRL 0x04 |
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#define | ADAV80X_AUX_IN_CTRL 0x05 |
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#define | ADAV80X_REC_CTRL 0x06 |
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#define | ADAV80X_AUX_OUT_CTRL 0x07 |
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#define | ADAV80X_DPATH_CTRL1 0x62 |
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#define | ADAV80X_DPATH_CTRL2 0x63 |
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#define | ADAV80X_DAC_CTRL1 0x64 |
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#define | ADAV80X_DAC_CTRL2 0x65 |
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#define | ADAV80X_DAC_CTRL3 0x66 |
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#define | ADAV80X_DAC_L_VOL 0x68 |
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#define | ADAV80X_DAC_R_VOL 0x69 |
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#define | ADAV80X_PGA_L_VOL 0x6c |
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#define | ADAV80X_PGA_R_VOL 0x6d |
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#define | ADAV80X_ADC_CTRL1 0x6e |
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#define | ADAV80X_ADC_CTRL2 0x6f |
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#define | ADAV80X_ADC_L_VOL 0x70 |
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#define | ADAV80X_ADC_R_VOL 0x71 |
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#define | ADAV80X_PLL_CTRL1 0x74 |
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#define | ADAV80X_PLL_CTRL2 0x75 |
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#define | ADAV80X_ICLK_CTRL1 0x76 |
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#define | ADAV80X_ICLK_CTRL2 0x77 |
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#define | ADAV80X_PLL_CLK_SRC 0x78 |
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#define | ADAV80X_PLL_OUTE 0x7a |
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#define | ADAV80X_PLL_CLK_SRC_PLL_XIN(pll) 0x00 |
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#define | ADAV80X_PLL_CLK_SRC_PLL_MCLKI(pll) (0x40 << (pll)) |
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#define | ADAV80X_PLL_CLK_SRC_PLL_MASK(pll) (0x40 << (pll)) |
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#define | ADAV80X_ICLK_CTRL1_DAC_SRC(src) ((src) << 5) |
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#define | ADAV80X_ICLK_CTRL1_ADC_SRC(src) ((src) << 2) |
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#define | ADAV80X_ICLK_CTRL1_ICLK2_SRC(src) (src) |
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#define | ADAV80X_ICLK_CTRL2_ICLK1_SRC(src) ((src) << 3) |
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#define | ADAV80X_PLL_CTRL1_PLLDIV 0x10 |
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#define | ADAV80X_PLL_CTRL1_PLLPD(pll) (0x04 << (pll)) |
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#define | ADAV80X_PLL_CTRL1_XTLPD 0x02 |
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#define | ADAV80X_PLL_CTRL2_FIELD(pll, x) ((x) << ((pll) * 4)) |
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#define | ADAV80X_PLL_CTRL2_FS_48(pll) ADAV80X_PLL_CTRL2_FIELD((pll), 0x00) |
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#define | ADAV80X_PLL_CTRL2_FS_32(pll) ADAV80X_PLL_CTRL2_FIELD((pll), 0x08) |
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#define | ADAV80X_PLL_CTRL2_FS_44(pll) ADAV80X_PLL_CTRL2_FIELD((pll), 0x0c) |
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#define | ADAV80X_PLL_CTRL2_SEL(pll) ADAV80X_PLL_CTRL2_FIELD((pll), 0x02) |
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#define | ADAV80X_PLL_CTRL2_DOUB(pll) ADAV80X_PLL_CTRL2_FIELD((pll), 0x01) |
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#define | ADAV80X_PLL_CTRL2_PLL_MASK(pll) ADAV80X_PLL_CTRL2_FIELD((pll), 0x0f) |
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#define | ADAV80X_ADC_CTRL1_MODULATOR_MASK 0x80 |
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#define | ADAV80X_ADC_CTRL1_MODULATOR_128FS 0x00 |
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#define | ADAV80X_ADC_CTRL1_MODULATOR_64FS 0x80 |
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#define | ADAV80X_DAC_CTRL1_PD 0x80 |
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#define | ADAV80X_DAC_CTRL2_DIV1 0x00 |
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#define | ADAV80X_DAC_CTRL2_DIV1_5 0x10 |
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#define | ADAV80X_DAC_CTRL2_DIV2 0x20 |
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#define | ADAV80X_DAC_CTRL2_DIV3 0x30 |
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#define | ADAV80X_DAC_CTRL2_DIV_MASK 0x30 |
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#define | ADAV80X_DAC_CTRL2_INTERPOL_256FS 0x00 |
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#define | ADAV80X_DAC_CTRL2_INTERPOL_128FS 0x40 |
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#define | ADAV80X_DAC_CTRL2_INTERPOL_64FS 0x80 |
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#define | ADAV80X_DAC_CTRL2_INTERPOL_MASK 0xc0 |
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#define | ADAV80X_DAC_CTRL2_DEEMPH_NONE 0x00 |
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#define | ADAV80X_DAC_CTRL2_DEEMPH_44 0x01 |
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#define | ADAV80X_DAC_CTRL2_DEEMPH_32 0x02 |
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#define | ADAV80X_DAC_CTRL2_DEEMPH_48 0x03 |
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#define | ADAV80X_DAC_CTRL2_DEEMPH_MASK 0x01 |
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#define | ADAV80X_CAPTURE_MODE_MASTER 0x20 |
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#define | ADAV80X_CAPTURE_WORD_LEN24 0x00 |
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#define | ADAV80X_CAPTURE_WORD_LEN20 0x04 |
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#define | ADAV80X_CAPTRUE_WORD_LEN18 0x08 |
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#define | ADAV80X_CAPTURE_WORD_LEN16 0x0c |
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#define | ADAV80X_CAPTURE_WORD_LEN_MASK 0x0c |
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#define | ADAV80X_CAPTURE_MODE_LEFT_J 0x00 |
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#define | ADAV80X_CAPTURE_MODE_I2S 0x01 |
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#define | ADAV80X_CAPTURE_MODE_RIGHT_J 0x03 |
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#define | ADAV80X_CAPTURE_MODE_MASK 0x03 |
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#define | ADAV80X_PLAYBACK_MODE_MASTER 0x10 |
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#define | ADAV80X_PLAYBACK_MODE_LEFT_J 0x00 |
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#define | ADAV80X_PLAYBACK_MODE_I2S 0x01 |
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#define | ADAV80X_PLAYBACK_MODE_RIGHT_J_24 0x04 |
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#define | ADAV80X_PLAYBACK_MODE_RIGHT_J_20 0x05 |
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#define | ADAV80X_PLAYBACK_MODE_RIGHT_J_18 0x06 |
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#define | ADAV80X_PLAYBACK_MODE_RIGHT_J_16 0x07 |
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#define | ADAV80X_PLAYBACK_MODE_MASK 0x07 |
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#define | ADAV80X_PLL_OUTE_SYSCLKPD(x) BIT(2 - (x)) |
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#define | ADAV80X_MUX_ENUM_DECL(name, reg, shift) |
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#define | ADAV80X_MUX(name, ctrl) SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) |
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#define | ADAV80X_PLAYBACK_RATES |
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#define | ADAV80X_CAPTURE_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000) |
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#define | ADAV80X_FORMATS |
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