20 #ifndef _AMCC_S5933_H_
21 #define _AMCC_S5933_H_
23 #include "../../comedidev.h"
26 #define FIFO_ADVANCE_ON_BYTE_2 0x20000000
29 #define AMWEN_ENABLE 0x02
31 #define A2P_FIFO_WRITE_ENABLE 0x01
34 #define AGCSTS_TC_ENABLE 0x10000000
40 #define APCI3120_ENABLE_TRANSFER_ADD_ON_LOW 0x00
41 #define APCI3120_ENABLE_TRANSFER_ADD_ON_HIGH 0x1200
42 #define APCI3120_A2P_FIFO_MANAGEMENT 0x04000400L
43 #define APCI3120_AMWEN_ENABLE 0x02
44 #define APCI3120_A2P_FIFO_WRITE_ENABLE 0x01
45 #define APCI3120_FIFO_ADVANCE_ON_BYTE_2 0x20000000L
46 #define APCI3120_ENABLE_WRITE_TC_INT 0x00004000L
47 #define APCI3120_CLEAR_WRITE_TC_INT 0x00040000L
48 #define APCI3120_DISABLE_AMWEN_AND_A2P_FIFO_WRITE 0x0
49 #define APCI3120_DISABLE_BUS_MASTER_ADD_ON 0x0
50 #define APCI3120_DISABLE_BUS_MASTER_PCI 0x0
53 #define APCI3120_ADD_ON_AGCSTS_LOW 0x3C
54 #define APCI3120_ADD_ON_AGCSTS_HIGH (APCI3120_ADD_ON_AGCSTS_LOW + 2)
55 #define APCI3120_ADD_ON_MWAR_LOW 0x24
56 #define APCI3120_ADD_ON_MWAR_HIGH (APCI3120_ADD_ON_MWAR_LOW + 2)
57 #define APCI3120_ADD_ON_MWTC_LOW 0x058
58 #define APCI3120_ADD_ON_MWTC_HIGH (APCI3120_ADD_ON_MWTC_LOW + 2)
61 #define APCI3120_AMCC_OP_MCSR 0x3C
62 #define APCI3120_AMCC_OP_REG_INTCSR 0x38
67 #define AMCC_OP_REG_OMB1 0x00
68 #define AMCC_OP_REG_OMB2 0x04
69 #define AMCC_OP_REG_OMB3 0x08
70 #define AMCC_OP_REG_OMB4 0x0c
71 #define AMCC_OP_REG_IMB1 0x10
72 #define AMCC_OP_REG_IMB2 0x14
73 #define AMCC_OP_REG_IMB3 0x18
74 #define AMCC_OP_REG_IMB4 0x1c
75 #define AMCC_OP_REG_FIFO 0x20
76 #define AMCC_OP_REG_MWAR 0x24
77 #define AMCC_OP_REG_MWTC 0x28
78 #define AMCC_OP_REG_MRAR 0x2c
79 #define AMCC_OP_REG_MRTC 0x30
80 #define AMCC_OP_REG_MBEF 0x34
81 #define AMCC_OP_REG_INTCSR 0x38
83 #define AMCC_OP_REG_INTCSR_SRC (AMCC_OP_REG_INTCSR + 2)
85 #define AMCC_OP_REG_INTCSR_FEC (AMCC_OP_REG_INTCSR + 3)
86 #define AMCC_OP_REG_MCSR 0x3c
88 #define AMCC_OP_REG_MCSR_NVDATA (AMCC_OP_REG_MCSR + 2)
90 #define AMCC_OP_REG_MCSR_NVCMD (AMCC_OP_REG_MCSR + 3)
92 #define AMCC_FIFO_DEPTH_DWORD 8
93 #define AMCC_FIFO_DEPTH_BYTES (8 * sizeof(u32))
98 #define AMCC_OP_REG_SIZE 64
103 #define AMCC_OP_REG_AIMB1 0x00
104 #define AMCC_OP_REG_AIMB2 0x04
105 #define AMCC_OP_REG_AIMB3 0x08
106 #define AMCC_OP_REG_AIMB4 0x0c
107 #define AMCC_OP_REG_AOMB1 0x10
108 #define AMCC_OP_REG_AOMB2 0x14
109 #define AMCC_OP_REG_AOMB3 0x18
110 #define AMCC_OP_REG_AOMB4 0x1c
111 #define AMCC_OP_REG_AFIFO 0x20
112 #define AMCC_OP_REG_AMWAR 0x24
113 #define AMCC_OP_REG_APTA 0x28
114 #define AMCC_OP_REG_APTD 0x2c
115 #define AMCC_OP_REG_AMRAR 0x30
116 #define AMCC_OP_REG_AMBEF 0x34
117 #define AMCC_OP_REG_AINT 0x38
118 #define AMCC_OP_REG_AGCSTS 0x3c
119 #define AMCC_OP_REG_AMWTC 0x58
120 #define AMCC_OP_REG_AMRTC 0x5c
125 #define AGCSTS_CONTROL_MASK 0xfffff000
126 #define AGCSTS_NV_ACC_MASK 0xe0000000
127 #define AGCSTS_RESET_MASK 0x0e000000
128 #define AGCSTS_NV_DA_MASK 0x00ff0000
129 #define AGCSTS_BIST_MASK 0x0000f000
130 #define AGCSTS_STATUS_MASK 0x000000ff
131 #define AGCSTS_TCZERO_MASK 0x000000c0
132 #define AGCSTS_FIFO_ST_MASK 0x0000003f
134 #define AGCSTS_RESET_MBFLAGS 0x08000000
135 #define AGCSTS_RESET_P2A_FIFO 0x04000000
136 #define AGCSTS_RESET_A2P_FIFO 0x02000000
137 #define AGCSTS_RESET_FIFOS (AGCSTS_RESET_A2P_FIFO | AGCSTS_RESET_P2A_FIFO)
139 #define AGCSTS_A2P_TCOUNT 0x00000080
140 #define AGCSTS_P2A_TCOUNT 0x00000040
142 #define AGCSTS_FS_P2A_EMPTY 0x00000020
143 #define AGCSTS_FS_P2A_HALF 0x00000010
144 #define AGCSTS_FS_P2A_FULL 0x00000008
146 #define AGCSTS_FS_A2P_EMPTY 0x00000004
147 #define AGCSTS_FS_A2P_HALF 0x00000002
148 #define AGCSTS_FS_A2P_FULL 0x00000001
153 #define AINT_INT_MASK 0x00ff0000
154 #define AINT_SEL_MASK 0x0000ffff
155 #define AINT_IS_ENSEL_MASK 0x00001f1f
157 #define AINT_INT_ASSERTED 0x00800000
158 #define AINT_BM_ERROR 0x00200000
159 #define AINT_BIST_INT 0x00100000
161 #define AINT_RT_COMPLETE 0x00080000
162 #define AINT_WT_COMPLETE 0x00040000
164 #define AINT_OUT_MB_INT 0x00020000
165 #define AINT_IN_MB_INT 0x00010000
167 #define AINT_READ_COMPL 0x00008000
168 #define AINT_WRITE_COMPL 0x00004000
170 #define AINT_OMB_ENABLE 0x00001000
171 #define AINT_OMB_SELECT 0x00000c00
172 #define AINT_OMB_BYTE 0x00000300
174 #define AINT_IMB_ENABLE 0x00000010
175 #define AINT_IMB_SELECT 0x0000000c
176 #define AINT_IMB_BYTE 0x00000003
179 #define EN_A2P_TRANSFERS 0x00000400
181 #define RESET_A2P_FLAGS 0x04000000L
183 #define A2P_HI_PRIORITY 0x00000100L
185 #define ANY_S593X_INT 0x00800000L
186 #define READ_TC_INT 0x00080000L
187 #define WRITE_TC_INT 0x00040000L
188 #define IN_MB_INT 0x00020000L
189 #define MASTER_ABORT_INT 0x00100000L
190 #define TARGET_ABORT_INT 0x00200000L
191 #define BUS_MASTER_INT 0x00200000L
211 static const int i_ADDIDATADeviceID[] = { 0x15B8, 0x10E8 };
252 for (i_Count = 0; i_Count < 2; i_Count++) {
253 pci_vendor = i_ADDIDATADeviceID[i_Count];
254 if (pcidev->
vendor == pci_vendor) {
274 for (i = 0; i < 5; i++)
293 for (amcc = amcc_devices; amcc; amcc =
next) {
308 for (amcc = amcc_devices; amcc; amcc =
next) {
310 if ((!amcc->
used) && (amcc->
device == device_id)
311 && (amcc->
vendor == vendor_id))
330 for (amcc = amcc_devices; amcc; amcc =
next) {
332 if ((amcc->
vendor == vendor_id) && (amcc->
device == device_id)
339 printk(
" - \nCard on requested position is used b:s %d:%d!\n",
364 for (i = 0; i < 5; i++)
396 for (amcc = amcc_devices; amcc; amcc =
next) {
399 (
"%2d %2d %2d 0x%4x 0x%4x 0x%8llx 0x%8llx %2u %2d\n",
402 (
unsigned long long)amcc->
io_addr[0],
403 (
unsigned long long)amcc->
io_addr[2], amcc->
irq,
423 for (i = 0; i < 5; i++)
439 if ((pci_bus < 1) & (pci_slot < 1)) {
443 printk(
" - Unused card not found in system!\n");
451 printk(
" - Card not found on requested position b:s %d:%d!\n",
455 printk(
" - Card on requested position is used b:s %d:%d!\n",
462 printk(
" - Can't allocate card!\n");