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Data Structures | Macros | Enumerations
amd8111_edac.h File Reference

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Data Structures

struct  amd8111_dev_info
 
struct  amd8111_pci_info
 

Macros

#define REG_PCI_STSCMD   0x04
 
#define REG_MEM_LIM   0x1c
 
#define REG_HT_LINK   0xc4
 
#define REG_PCI_INTBRG_CTRL   0x3c
 
#define REG_IO_CTRL_1   0x40
 
#define REG_AT_COMPAT   0x61
 

Enumerations

enum  pci_stscmd_bits {
  PCI_STSCMD_SSE = BIT(30), PCI_STSCMD_RMA = BIT(29), PCI_STSCMD_RTA = BIT(28), PCI_STSCMD_SERREN = BIT(8),
  PCI_STSCMD_CLEAR_MASK
}
 
enum  mem_limit_bits {
  MEM_LIMIT_DPE = BIT(31), MEM_LIMIT_RSE = BIT(30), MEM_LIMIT_RMA = BIT(29), MEM_LIMIT_RTA = BIT(28),
  MEM_LIMIT_STA = BIT(27), MEM_LIMIT_MDPE = BIT(24), MEM_LIMIT_CLEAR_MASK, MEM_LIMIT_DPE = BIT(31),
  MEM_LIMIT_RSE = BIT(30), MEM_LIMIT_RMA = BIT(29), MEM_LIMIT_RTA = BIT(28), MEM_LIMIT_STA = BIT(27),
  MEM_LIMIT_MDPE = BIT(24), MEM_LIMIT_MASK
}
 
enum  ht_link_bits { HT_LINK_LKFAIL = BIT(4), HT_LINK_CRCFEN = BIT(1), HT_LINK_CLEAR_MASK = (HT_LINK_LKFAIL) }
 
enum  pci_intbrg_ctrl_bits {
  PCI_INTBRG_CTRL_DTSERREN = BIT(27), PCI_INTBRG_CTRL_DTSTAT = BIT(26), PCI_INTBRG_CTRL_MARSP = BIT(21), PCI_INTBRG_CTRL_SERREN = BIT(17),
  PCI_INTBRG_CTRL_PEREN = BIT(16), PCI_INTBRG_CTRL_CLEAR_MASK = (PCI_INTBRG_CTRL_DTSTAT), PCI_INTBRG_CTRL_POLL_MASK
}
 
enum  io_ctrl_1_bits { IO_CTRL_1_NMIONERR = BIT(7), IO_CTRL_1_LPC_ERR = BIT(6), IO_CTRL_1_PW2LPC = BIT(1), IO_CTRL_1_CLEAR_MASK = (IO_CTRL_1_LPC_ERR | IO_CTRL_1_PW2LPC) }
 
enum  at_compat_bits { AT_COMPAT_SERR = BIT(7), AT_COMPAT_IOCHK = BIT(6), AT_COMPAT_CLRIOCHK = BIT(3), AT_COMPAT_CLRSERR = BIT(2) }
 

Macro Definition Documentation

#define REG_AT_COMPAT   0x61

Definition at line 100 of file amd8111_edac.h.

#define REG_HT_LINK   0xc4

Definition at line 63 of file amd8111_edac.h.

#define REG_IO_CTRL_1   0x40

Definition at line 89 of file amd8111_edac.h.

#define REG_MEM_LIM   0x1c

Definition at line 44 of file amd8111_edac.h.

#define REG_PCI_INTBRG_CTRL   0x3c

Definition at line 73 of file amd8111_edac.h.

#define REG_PCI_STSCMD   0x04

Definition at line 30 of file amd8111_edac.h.

Enumeration Type Documentation

Enumerator:
AT_COMPAT_SERR 
AT_COMPAT_IOCHK 
AT_COMPAT_CLRIOCHK 
AT_COMPAT_CLRSERR 

Definition at line 101 of file amd8111_edac.h.

Enumerator:
HT_LINK_LKFAIL 
HT_LINK_CRCFEN 
HT_LINK_CLEAR_MASK 

Definition at line 64 of file amd8111_edac.h.

Enumerator:
IO_CTRL_1_NMIONERR 
IO_CTRL_1_LPC_ERR 
IO_CTRL_1_PW2LPC 
IO_CTRL_1_CLEAR_MASK 

Definition at line 90 of file amd8111_edac.h.

Enumerator:
MEM_LIMIT_DPE 
MEM_LIMIT_RSE 
MEM_LIMIT_RMA 
MEM_LIMIT_RTA 
MEM_LIMIT_STA 
MEM_LIMIT_MDPE 
MEM_LIMIT_CLEAR_MASK 
MEM_LIMIT_DPE 
MEM_LIMIT_RSE 
MEM_LIMIT_RMA 
MEM_LIMIT_RTA 
MEM_LIMIT_STA 
MEM_LIMIT_MDPE 
MEM_LIMIT_MASK 

Definition at line 45 of file amd8111_edac.h.

Enumerator:
PCI_INTBRG_CTRL_DTSERREN 
PCI_INTBRG_CTRL_DTSTAT 
PCI_INTBRG_CTRL_MARSP 
PCI_INTBRG_CTRL_SERREN 
PCI_INTBRG_CTRL_PEREN 
PCI_INTBRG_CTRL_CLEAR_MASK 
PCI_INTBRG_CTRL_POLL_MASK 

Definition at line 74 of file amd8111_edac.h.

Enumerator:
PCI_STSCMD_SSE 
PCI_STSCMD_RMA 
PCI_STSCMD_RTA 
PCI_STSCMD_SERREN 
PCI_STSCMD_CLEAR_MASK 

Definition at line 31 of file amd8111_edac.h.