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arm_generic.h
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1 /*
2  * arch/arm64/include/asm/arm_generic.h
3  *
4  * Copyright (C) 2012 ARM Ltd.
5  * Author: Marc Zyngier <[email protected]>
6  *
7  * This program is free software: you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program. If not, see <http://www.gnu.org/licenses/>.
18  */
19 #ifndef __ASM_ARM_GENERIC_H
20 #define __ASM_ARM_GENERIC_H
21 
22 #include <linux/clocksource.h>
23 
24 #define ARCH_TIMER_CTRL_ENABLE (1 << 0)
25 #define ARCH_TIMER_CTRL_IMASK (1 << 1)
26 #define ARCH_TIMER_CTRL_ISTATUS (1 << 2)
27 
28 #define ARCH_TIMER_REG_CTRL 0
29 #define ARCH_TIMER_REG_FREQ 1
30 #define ARCH_TIMER_REG_TVAL 2
31 
32 static inline void arch_timer_reg_write(int reg, u32 val)
33 {
34  switch (reg) {
36  asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
37  break;
39  asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
40  break;
41  default:
42  BUILD_BUG();
43  }
44 
45  isb();
46 }
47 
48 static inline u32 arch_timer_reg_read(int reg)
49 {
50  u32 val;
51 
52  switch (reg) {
54  asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val));
55  break;
57  asm volatile("mrs %0, cntfrq_el0" : "=r" (val));
58  break;
60  asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
61  break;
62  default:
63  BUILD_BUG();
64  }
65 
66  return val;
67 }
68 
69 static inline void __cpuinit arch_counter_enable_user_access(void)
70 {
71  u32 cntkctl;
72 
73  /* Disable user access to the timers and the virtual counter. */
74  asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
75  cntkctl &= ~((3 << 8) | (1 << 1));
76 
77  /* Enable user access to the physical counter and frequency. */
78  cntkctl |= 1;
79  asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
80 }
81 
82 static inline cycle_t arch_counter_get_cntpct(void)
83 {
84  cycle_t cval;
85 
86  asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
87 
88  return cval;
89 }
90 
91 static inline cycle_t arch_counter_get_cntvct(void)
92 {
93  cycle_t cval;
94 
95  asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
96 
97  return cval;
98 }
99 
100 #endif