Linux Kernel
3.7.1
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#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/firmware.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <mach/npe.h>
Go to the source code of this file.
Macros | |
#define | DEBUG_MSG 0 |
#define | DEBUG_FW 0 |
#define | NPE_COUNT 3 |
#define | MAX_RETRIES 1000 /* microseconds */ |
#define | NPE_42X_DATA_SIZE 0x800 /* in dwords */ |
#define | NPE_46X_DATA_SIZE 0x1000 |
#define | NPE_A_42X_INSTR_SIZE 0x1000 |
#define | NPE_B_AND_C_42X_INSTR_SIZE 0x800 |
#define | NPE_46X_INSTR_SIZE 0x1000 |
#define | REGS_SIZE 0x1000 |
#define | NPE_PHYS_REG 32 |
#define | FW_MAGIC 0xFEEDF00D |
#define | FW_BLOCK_TYPE_INSTR 0x0 |
#define | FW_BLOCK_TYPE_DATA 0x1 |
#define | FW_BLOCK_TYPE_EOF 0xF |
#define | CMD_NPE_STEP 0x01 |
#define | CMD_NPE_START 0x02 |
#define | CMD_NPE_STOP 0x03 |
#define | CMD_NPE_CLR_PIPE 0x04 |
#define | CMD_CLR_PROFILE_CNT 0x0C |
#define | CMD_RD_INS_MEM 0x10 /* instruction memory */ |
#define | CMD_WR_INS_MEM 0x11 |
#define | CMD_RD_DATA_MEM 0x12 /* data memory */ |
#define | CMD_WR_DATA_MEM 0x13 |
#define | CMD_RD_ECS_REG 0x14 /* exec access register */ |
#define | CMD_WR_ECS_REG 0x15 |
#define | STAT_RUN 0x80000000 |
#define | STAT_STOP 0x40000000 |
#define | STAT_CLEAR 0x20000000 |
#define | STAT_ECS_K 0x00800000 /* pipeline clean */ |
#define | NPE_STEVT 0x1B |
#define | NPE_STARTPC 0x1C |
#define | NPE_REGMAP 0x1E |
#define | NPE_CINDEX 0x1F |
#define | INSTR_WR_REG_SHORT 0x0000C000 |
#define | INSTR_WR_REG_BYTE 0x00004000 |
#define | INSTR_RD_FIFO 0x0F888220 |
#define | INSTR_RESET_MBOX 0x0FAC8210 |
#define | ECS_BG_CTXT_REG_0 0x00 /* Background Executing Context */ |
#define | ECS_BG_CTXT_REG_1 0x01 /* Stack level */ |
#define | ECS_BG_CTXT_REG_2 0x02 |
#define | ECS_PRI_1_CTXT_REG_0 0x04 /* Priority 1 Executing Context */ |
#define | ECS_PRI_1_CTXT_REG_1 0x05 /* Stack level */ |
#define | ECS_PRI_1_CTXT_REG_2 0x06 |
#define | ECS_PRI_2_CTXT_REG_0 0x08 /* Priority 2 Executing Context */ |
#define | ECS_PRI_2_CTXT_REG_1 0x09 /* Stack level */ |
#define | ECS_PRI_2_CTXT_REG_2 0x0A |
#define | ECS_DBG_CTXT_REG_0 0x0C /* Debug Executing Context */ |
#define | ECS_DBG_CTXT_REG_1 0x0D /* Stack level */ |
#define | ECS_DBG_CTXT_REG_2 0x0E |
#define | ECS_INSTRUCT_REG 0x11 /* NPE Instruction Register */ |
#define | ECS_REG_0_ACTIVE 0x80000000 /* all levels */ |
#define | ECS_REG_0_NEXTPC_MASK 0x1FFF0000 /* BG/PRI1/PRI2 levels */ |
#define | ECS_REG_0_LDUR_BITS 8 |
#define | ECS_REG_0_LDUR_MASK 0x00000700 /* all levels */ |
#define | ECS_REG_1_CCTXT_BITS 16 |
#define | ECS_REG_1_CCTXT_MASK 0x000F0000 /* all levels */ |
#define | ECS_REG_1_SELCTXT_BITS 0 |
#define | ECS_REG_1_SELCTXT_MASK 0x0000000F /* all levels */ |
#define | ECS_DBG_REG_2_IF 0x00100000 /* debug level */ |
#define | ECS_DBG_REG_2_IE 0x00080000 /* debug level */ |
#define | WFIFO_VALID 0x80000000 |
#define | MSGSTAT_OFNE 0x00010000 /* OutFifoNotEmpty */ |
#define | MSGSTAT_IFNF 0x00020000 /* InFifoNotFull */ |
#define | MSGSTAT_OFNF 0x00040000 /* OutFifoNotFull */ |
#define | MSGSTAT_IFNE 0x00080000 /* InFifoNotEmpty */ |
#define | MSGSTAT_MBINT 0x00100000 /* Mailbox interrupt */ |
#define | MSGSTAT_IFINT 0x00200000 /* InFifo interrupt */ |
#define | MSGSTAT_OFINT 0x00400000 /* OutFifo interrupt */ |
#define | MSGSTAT_WFINT 0x00800000 /* WatchFifo interrupt */ |
#define | MSGCTL_OUT_FIFO 0x00010000 /* enable output FIFO */ |
#define | MSGCTL_IN_FIFO 0x00020000 /* enable input FIFO */ |
#define | MSGCTL_OUT_FIFO_WRITE 0x01000000 /* enable FIFO + WRITE */ |
#define | MSGCTL_IN_FIFO_WRITE 0x02000000 |
#define | RESET_MBOX_STAT 0x0000F0F0 |
#define | NPE_A_FIRMWARE "NPE-A" |
#define | NPE_B_FIRMWARE "NPE-B" |
#define | NPE_C_FIRMWARE "NPE-C" |
#define | print_npe(pri, npe, fmt,...) printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__) |
#define | debug_msg(npe, fmt,...) |
Functions | |
int | npe_running (struct npe *npe) |
int | npe_send_message (struct npe *npe, const void *msg, const char *what) |
int | npe_recv_message (struct npe *npe, void *msg, const char *what) |
int | npe_send_recv_message (struct npe *npe, void *msg, const char *what) |
int | npe_load_firmware (struct npe *npe, const char *name, struct device *dev) |
struct npe * | npe_request (unsigned id) |
void | npe_release (struct npe *npe) |
module_init (npe_init_module) | |
module_exit (npe_cleanup_module) | |
MODULE_AUTHOR ("Krzysztof Halasa") | |
MODULE_LICENSE ("GPL v2") | |
MODULE_FIRMWARE (NPE_A_FIRMWARE) | |
MODULE_FIRMWARE (NPE_B_FIRMWARE) | |
MODULE_FIRMWARE (NPE_C_FIRMWARE) | |
EXPORT_SYMBOL (npe_names) | |
EXPORT_SYMBOL (npe_running) | |
EXPORT_SYMBOL (npe_request) | |
EXPORT_SYMBOL (npe_release) | |
EXPORT_SYMBOL (npe_load_firmware) | |
EXPORT_SYMBOL (npe_send_message) | |
EXPORT_SYMBOL (npe_recv_message) | |
EXPORT_SYMBOL (npe_send_recv_message) | |
Variables | |
const char * | npe_names [] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE } |
#define CMD_CLR_PROFILE_CNT 0x0C |
Definition at line 49 of file ixp4xx_npe.c.
#define CMD_NPE_CLR_PIPE 0x04 |
Definition at line 48 of file ixp4xx_npe.c.
#define CMD_NPE_START 0x02 |
Definition at line 46 of file ixp4xx_npe.c.
#define CMD_NPE_STEP 0x01 |
Definition at line 45 of file ixp4xx_npe.c.
#define CMD_NPE_STOP 0x03 |
Definition at line 47 of file ixp4xx_npe.c.
#define CMD_RD_DATA_MEM 0x12 /* data memory */ |
Definition at line 52 of file ixp4xx_npe.c.
#define CMD_RD_ECS_REG 0x14 /* exec access register */ |
Definition at line 54 of file ixp4xx_npe.c.
#define CMD_RD_INS_MEM 0x10 /* instruction memory */ |
Definition at line 50 of file ixp4xx_npe.c.
#define CMD_WR_DATA_MEM 0x13 |
Definition at line 53 of file ixp4xx_npe.c.
#define CMD_WR_ECS_REG 0x15 |
Definition at line 55 of file ixp4xx_npe.c.
#define CMD_WR_INS_MEM 0x11 |
Definition at line 51 of file ixp4xx_npe.c.
#define DEBUG_FW 0 |
Definition at line 26 of file ixp4xx_npe.c.
#define DEBUG_MSG 0 |
Definition at line 25 of file ixp4xx_npe.c.
Definition at line 132 of file ixp4xx_npe.c.
#define ECS_BG_CTXT_REG_0 0x00 /* Background Executing Context */ |
Definition at line 72 of file ixp4xx_npe.c.
#define ECS_BG_CTXT_REG_1 0x01 /* Stack level */ |
Definition at line 73 of file ixp4xx_npe.c.
#define ECS_BG_CTXT_REG_2 0x02 |
Definition at line 74 of file ixp4xx_npe.c.
#define ECS_DBG_CTXT_REG_0 0x0C /* Debug Executing Context */ |
Definition at line 81 of file ixp4xx_npe.c.
#define ECS_DBG_CTXT_REG_1 0x0D /* Stack level */ |
Definition at line 82 of file ixp4xx_npe.c.
#define ECS_DBG_CTXT_REG_2 0x0E |
Definition at line 83 of file ixp4xx_npe.c.
#define ECS_DBG_REG_2_IE 0x00080000 /* debug level */ |
Definition at line 95 of file ixp4xx_npe.c.
#define ECS_DBG_REG_2_IF 0x00100000 /* debug level */ |
Definition at line 94 of file ixp4xx_npe.c.
#define ECS_INSTRUCT_REG 0x11 /* NPE Instruction Register */ |
Definition at line 84 of file ixp4xx_npe.c.
#define ECS_PRI_1_CTXT_REG_0 0x04 /* Priority 1 Executing Context */ |
Definition at line 75 of file ixp4xx_npe.c.
#define ECS_PRI_1_CTXT_REG_1 0x05 /* Stack level */ |
Definition at line 76 of file ixp4xx_npe.c.
#define ECS_PRI_1_CTXT_REG_2 0x06 |
Definition at line 77 of file ixp4xx_npe.c.
#define ECS_PRI_2_CTXT_REG_0 0x08 /* Priority 2 Executing Context */ |
Definition at line 78 of file ixp4xx_npe.c.
#define ECS_PRI_2_CTXT_REG_1 0x09 /* Stack level */ |
Definition at line 79 of file ixp4xx_npe.c.
#define ECS_PRI_2_CTXT_REG_2 0x0A |
Definition at line 80 of file ixp4xx_npe.c.
#define ECS_REG_0_ACTIVE 0x80000000 /* all levels */ |
Definition at line 86 of file ixp4xx_npe.c.
#define ECS_REG_0_LDUR_BITS 8 |
Definition at line 88 of file ixp4xx_npe.c.
#define ECS_REG_0_LDUR_MASK 0x00000700 /* all levels */ |
Definition at line 89 of file ixp4xx_npe.c.
#define ECS_REG_0_NEXTPC_MASK 0x1FFF0000 /* BG/PRI1/PRI2 levels */ |
Definition at line 87 of file ixp4xx_npe.c.
#define ECS_REG_1_CCTXT_BITS 16 |
Definition at line 90 of file ixp4xx_npe.c.
#define ECS_REG_1_CCTXT_MASK 0x000F0000 /* all levels */ |
Definition at line 91 of file ixp4xx_npe.c.
#define ECS_REG_1_SELCTXT_BITS 0 |
Definition at line 92 of file ixp4xx_npe.c.
#define ECS_REG_1_SELCTXT_MASK 0x0000000F /* all levels */ |
Definition at line 93 of file ixp4xx_npe.c.
#define FW_BLOCK_TYPE_DATA 0x1 |
Definition at line 41 of file ixp4xx_npe.c.
#define FW_BLOCK_TYPE_EOF 0xF |
Definition at line 42 of file ixp4xx_npe.c.
#define FW_BLOCK_TYPE_INSTR 0x0 |
Definition at line 40 of file ixp4xx_npe.c.
#define FW_MAGIC 0xFEEDF00D |
Definition at line 39 of file ixp4xx_npe.c.
#define INSTR_RD_FIFO 0x0F888220 |
Definition at line 69 of file ixp4xx_npe.c.
#define INSTR_RESET_MBOX 0x0FAC8210 |
Definition at line 70 of file ixp4xx_npe.c.
#define INSTR_WR_REG_BYTE 0x00004000 |
Definition at line 68 of file ixp4xx_npe.c.
#define INSTR_WR_REG_SHORT 0x0000C000 |
Definition at line 67 of file ixp4xx_npe.c.
#define MAX_RETRIES 1000 /* microseconds */ |
Definition at line 29 of file ixp4xx_npe.c.
#define MSGCTL_IN_FIFO 0x00020000 /* enable input FIFO */ |
Definition at line 112 of file ixp4xx_npe.c.
#define MSGCTL_IN_FIFO_WRITE 0x02000000 |
Definition at line 114 of file ixp4xx_npe.c.
#define MSGCTL_OUT_FIFO 0x00010000 /* enable output FIFO */ |
Definition at line 111 of file ixp4xx_npe.c.
#define MSGCTL_OUT_FIFO_WRITE 0x01000000 /* enable FIFO + WRITE */ |
Definition at line 113 of file ixp4xx_npe.c.
#define MSGSTAT_IFINT 0x00200000 /* InFifo interrupt */ |
Definition at line 106 of file ixp4xx_npe.c.
#define MSGSTAT_IFNE 0x00080000 /* InFifoNotEmpty */ |
Definition at line 104 of file ixp4xx_npe.c.
#define MSGSTAT_IFNF 0x00020000 /* InFifoNotFull */ |
Definition at line 102 of file ixp4xx_npe.c.
#define MSGSTAT_MBINT 0x00100000 /* Mailbox interrupt */ |
Definition at line 105 of file ixp4xx_npe.c.
#define MSGSTAT_OFINT 0x00400000 /* OutFifo interrupt */ |
Definition at line 107 of file ixp4xx_npe.c.
#define MSGSTAT_OFNE 0x00010000 /* OutFifoNotEmpty */ |
Definition at line 101 of file ixp4xx_npe.c.
#define MSGSTAT_OFNF 0x00040000 /* OutFifoNotFull */ |
Definition at line 103 of file ixp4xx_npe.c.
#define MSGSTAT_WFINT 0x00800000 /* WatchFifo interrupt */ |
Definition at line 108 of file ixp4xx_npe.c.
#define NPE_42X_DATA_SIZE 0x800 /* in dwords */ |
Definition at line 30 of file ixp4xx_npe.c.
#define NPE_46X_DATA_SIZE 0x1000 |
Definition at line 31 of file ixp4xx_npe.c.
#define NPE_46X_INSTR_SIZE 0x1000 |
Definition at line 34 of file ixp4xx_npe.c.
#define NPE_A_42X_INSTR_SIZE 0x1000 |
Definition at line 32 of file ixp4xx_npe.c.
#define NPE_A_FIRMWARE "NPE-A" |
Definition at line 119 of file ixp4xx_npe.c.
#define NPE_B_AND_C_42X_INSTR_SIZE 0x800 |
Definition at line 33 of file ixp4xx_npe.c.
#define NPE_B_FIRMWARE "NPE-B" |
Definition at line 120 of file ixp4xx_npe.c.
#define NPE_C_FIRMWARE "NPE-C" |
Definition at line 121 of file ixp4xx_npe.c.
#define NPE_CINDEX 0x1F |
Definition at line 65 of file ixp4xx_npe.c.
#define NPE_COUNT 3 |
Definition at line 28 of file ixp4xx_npe.c.
#define NPE_PHYS_REG 32 |
Definition at line 37 of file ixp4xx_npe.c.
#define NPE_REGMAP 0x1E |
Definition at line 64 of file ixp4xx_npe.c.
#define NPE_STARTPC 0x1C |
Definition at line 63 of file ixp4xx_npe.c.
#define NPE_STEVT 0x1B |
Definition at line 62 of file ixp4xx_npe.c.
Definition at line 125 of file ixp4xx_npe.c.
#define REGS_SIZE 0x1000 |
Definition at line 35 of file ixp4xx_npe.c.
#define RESET_MBOX_STAT 0x0000F0F0 |
Definition at line 117 of file ixp4xx_npe.c.
#define STAT_CLEAR 0x20000000 |
Definition at line 59 of file ixp4xx_npe.c.
#define STAT_ECS_K 0x00800000 /* pipeline clean */ |
Definition at line 60 of file ixp4xx_npe.c.
#define STAT_RUN 0x80000000 |
Definition at line 57 of file ixp4xx_npe.c.
#define STAT_STOP 0x40000000 |
Definition at line 58 of file ixp4xx_npe.c.
#define WFIFO_VALID 0x80000000 |
Definition at line 98 of file ixp4xx_npe.c.
EXPORT_SYMBOL | ( | npe_names | ) |
EXPORT_SYMBOL | ( | npe_running | ) |
EXPORT_SYMBOL | ( | npe_request | ) |
EXPORT_SYMBOL | ( | npe_release | ) |
EXPORT_SYMBOL | ( | npe_load_firmware | ) |
EXPORT_SYMBOL | ( | npe_send_message | ) |
EXPORT_SYMBOL | ( | npe_recv_message | ) |
EXPORT_SYMBOL | ( | npe_send_recv_message | ) |
MODULE_AUTHOR | ( | "Krzysztof Halasa" | ) |
module_exit | ( | npe_cleanup_module | ) |
MODULE_FIRMWARE | ( | NPE_A_FIRMWARE | ) |
MODULE_FIRMWARE | ( | NPE_B_FIRMWARE | ) |
MODULE_FIRMWARE | ( | NPE_C_FIRMWARE | ) |
module_init | ( | npe_init_module | ) |
MODULE_LICENSE | ( | "GPL v2" | ) |
Definition at line 508 of file ixp4xx_npe.c.
Definition at line 451 of file ixp4xx_npe.c.
Definition at line 680 of file ixp4xx_npe.c.
Definition at line 671 of file ixp4xx_npe.c.
Definition at line 169 of file ixp4xx_npe.c.
Definition at line 412 of file ixp4xx_npe.c.
Definition at line 489 of file ixp4xx_npe.c.
const char* npe_names[] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE } |
Definition at line 123 of file ixp4xx_npe.c.
Definition at line 136 of file ixp4xx_npe.c.
u32 val |
Definition at line 136 of file ixp4xx_npe.c.