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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include <mach/ep93xx-regs.h>Go to the source code of this file.
Functions | |
| void | ep93xx_syscon_swlocked_write (unsigned int val, void __iomem *reg) |
| void | ep93xx_devcfg_set_clear (unsigned int set_bits, unsigned int clear_bits) |
| #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) |
| #define EP93XX_AAC_PHYS_BASE EP93XX_APB_PHYS(0x00080000) |
| #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) |
| #define EP93XX_BOOT_ROM_BASE EP93XX_AHB_IOMEM(0x00090000) |
| #define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */ |
| #define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */ |
| #define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) |
| #define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) |
| #define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000) |
| #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) |
| #define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) |
| #define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000) |
| #define EP93XX_IDE_BASE EP93XX_AHB_IOMEM(0x000a0000) |
| #define EP93XX_IDE_PHYS_BASE EP93XX_AHB_PHYS(0x000a0000) |
| #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) |
| #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) |
| #define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000) |
| #define EP93XX_PCMCIA_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00080000) |
| #define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) |
| #define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000) |
| #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) |
| #define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000) |
| #define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) |
| #define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000) |
| #define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */ |
| #define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */ |
| #define EP93XX_SDRAM_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00060000) |
| #define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000) |
| #define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000) |
| #define EP93XX_SPI_PHYS_BASE EP93XX_APB_PHYS(0x000a0000) |
| #define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) |
| #define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20) |
| #define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24) |
| #define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80) |
| #define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08) |
| #define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c) |
| #define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) |
| #define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00) |
| #define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04) |
| #define EP93XX_SYSCON_REG | ( | x | ) | (EP93XX_SYSCON_BASE + (x)) |
| #define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) |
| #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) |
| #define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c) |
| #define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84) |
| #define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000) |
| #define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) |
| #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) |
| #define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000) |
| #define EP93XX_VIC1_BASE EP93XX_AHB_IOMEM(0x000b0000) |
| #define EP93XX_VIC2_BASE EP93XX_AHB_IOMEM(0x000c0000) |
| #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) |
| #define EP93XX_WATCHDOG_PHYS_BASE EP93XX_APB_PHYS(0x00140000) |
1.8.2