Linux Kernel
3.7.1
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#include "boards.h"
Go to the source code of this file.
Macros | |
#define | IOCLK (3686400L) |
#define | IO_VIRT 0xf0000000 /* IO peripherals */ |
#define | IO_PHYS 0x80000000 |
#define | IO_SIZE 0x00050000 |
#define | CPU_IO(x) (*(volatile u32*)(x)) |
#define | CPU_REG(x, y) CPU_IO(x+y) |
#define | IRQ_REG(x) CPU_REG(IRQC_VIRT,x) |
#define | GPIO_VIRT(x) (IO_VIRT + 0x23000 + ((x)<<5)) |
#define | GPIO_A_VIRT (GPIO_VIRT(0)) |
#define | GPIO_B_VIRT (GPIO_VIRT(1)) |
#define | GPIO_C_VIRT (GPIO_VIRT(2)) |
#define | GPIO_D_VIRT (GPIO_VIRT(3)) |
#define | GPIO_E_VIRT (GPIO_VIRT(4)) |
#define | GPIO_AMULSEL (GPIO_VIRT(0) + 0xA4) |
#define | AMULSEL_USIN2 (1<<5) |
#define | AMULSEL_USOUT2 (1<<6) |
#define | AMULSEL_USIN3 (1<<13) |
#define | AMULSEL_USOUT3 (1<<14) |
#define | AMULSEL_IRDIN (1<<15) |
#define | AMULSEL_IRDOUT (1<<7) |
#define | GPIO_DATA 0x00 |
#define | GPIO_DIR 0x04 |
#define | GPIO_MASK 0x08 |
#define | GPIO_STAT 0x0C |
#define | GPIO_EDGE 0x10 |
#define | GPIO_CLR 0x14 |
#define | GPIO_POL 0x18 |
#define | GPIO_EN 0x1C |
#define | IRQC_VIRT (IO_VIRT + 0x24000) |
#define | IRQC_IER 0x00 |
#define | IRQC_ISR 0x04 |
#define | TIMER_VIRT (IO_VIRT + 0x25000) |
#define | TM0_PERIOD 0x00 |
#define | TM0_COUNT 0x08 |
#define | TM0_CTRL 0x10 |
#define | TM1_PERIOD 0x20 |
#define | TM1_COUNT 0x28 |
#define | TM1_CTRL 0x30 |
#define | TM2_PERIOD 0x40 |
#define | TM2_COUNT 0x48 |
#define | TM2_CTRL 0x50 |
#define | TIMER_TOPCTRL 0x60 |
#define | TIMER_TOPSTAT 0x64 |
#define | T64_COUNTL 0x80 |
#define | T64_COUNTH 0x84 |
#define | T64_CTRL 0x88 |
#define | T64_BASEL 0x94 |
#define | T64_BASEH 0x98 |
#define | TSTAT_T0INT 0x1 |
#define | TSTAT_T1INT 0x2 |
#define | TSTAT_T2INT 0x4 |
#define | TSTAT_T3INT 0x8 |
#define | TM_START 0x1 |
#define | TM_REPEAT 0x2 |
#define | TM_RESET 0x4 |
#define | ENABLE_TM0_INTR 0x1 |
#define | ENABLE_TM1_INTR 0x2 |
#define | ENABLE_TM2_INTR 0x4 |
#define | TIMER_ENABLE_BIT 0x8 |
#define | ENABLE_TIMER64 0x10 |
#define | ENABLE_TIMER64_INT 0x20 |
#define | PMU_BASE (IO_VIRT + 0x1000) |
#define | PMU_MODE 0x00 |
#define | PMU_STAT 0x20 |
#define | PMU_PLL_CTRL 0x28 |
#define | PMU_MODE_SLOW 0x00 |
#define | PMU_MODE_RUN 0x01 |
#define | PMU_MODE_IDLE 0x02 |
#define | PMU_MODE_SLEEP 0x03 |
#define | PMU_MODE_INIT 0x04 |
#define | PMU_MODE_DEEPSLEEP 0x07 |
#define | PMU_MODE_WAKEUP 0x08 |
#define | PLL_2_EN 0x8000 |
#define | PLL_1_EN 0x4000 |
#define | PLL_3_MUTE 0x0080 |
#define | PMU_WARMRESET 0x00010000 |
#define | PLL_CTRL_MASK23 0x000080ff |
#define | LCD_BASE (IO_VIRT + 0x10000) |
#define | LCD_CTRL 0x00 |
#define | LCD_STATUS 0x04 |
#define | LCD_STATUS_M 0x08 |
#define | LCD_INTERRUPT 0x0C |
#define | LCD_DBAR 0x10 |
#define | LCD_DCAR 0x14 |
#define | LCD_TIMING0 0x20 |
#define | LCD_TIMING1 0x24 |
#define | LCD_TIMING2 0x28 |
#define | LCD_TEST 0x40 |
#define | LCD_CTRL_LCD_ENABLE 0x00000001 |
#define | LCD_CTRL_LCD_BPP_MASK 0x00000006 |
#define | LCD_CTRL_LCD_4BPP 0x00000000 |
#define | LCD_CTRL_LCD_8BPP 0x00000002 |
#define | LCD_CTRL_LCD_16BPP 0x00000004 |
#define | LCD_CTRL_LCD_BW 0x00000008 |
#define | LCD_CTRL_LCD_TFT 0x00000010 |
#define | LCD_CTRL_BGR 0x00001000 |
#define | LCD_CTRL_LCD_VCOMP 0x00080000 |
#define | LCD_CTRL_LCD_MONO8 0x00200000 |
#define | LCD_CTRL_LCD_PWR 0x00400000 |
#define | LCD_CTRL_LCD_BLE 0x00800000 |
#define | LCD_CTRL_LDBUSEN 0x01000000 |
#define | LCD_PALETTE_BASE (IO_VIRT + 0x10400) |
#define | SERIAL0_OFS 0x20000 |
#define | SERIAL0_VIRT (IO_VIRT + SERIAL0_OFS) |
#define | SERIAL0_BASE (IO_PHYS + SERIAL0_OFS) |
#define | SERIAL1_OFS 0x21000 |
#define | SERIAL1_VIRT (IO_VIRT + SERIAL1_OFS) |
#define | SERIAL1_BASE (IO_PHYS + SERIAL1_OFS) |
#define | SERIAL_ENABLE 0x30 |
#define | SERIAL_ENABLE_EN (1<<0) |
#define | __ASM_ARCH_HARDWARE_INCMACH_H |
#define __ASM_ARCH_HARDWARE_INCMACH_H |
Definition at line 186 of file hardware.h.
#define AMULSEL_IRDIN (1<<15) |
Definition at line 61 of file hardware.h.
#define AMULSEL_IRDOUT (1<<7) |
Definition at line 62 of file hardware.h.
#define AMULSEL_USIN2 (1<<5) |
Definition at line 57 of file hardware.h.
#define AMULSEL_USIN3 (1<<13) |
Definition at line 59 of file hardware.h.
#define AMULSEL_USOUT2 (1<<6) |
Definition at line 58 of file hardware.h.
#define AMULSEL_USOUT3 (1<<14) |
Definition at line 60 of file hardware.h.
Definition at line 39 of file hardware.h.
#define ENABLE_TIMER64 0x10 |
Definition at line 113 of file hardware.h.
#define ENABLE_TIMER64_INT 0x20 |
Definition at line 114 of file hardware.h.
#define ENABLE_TM0_INTR 0x1 |
Definition at line 109 of file hardware.h.
#define ENABLE_TM1_INTR 0x2 |
Definition at line 110 of file hardware.h.
#define ENABLE_TM2_INTR 0x4 |
Definition at line 111 of file hardware.h.
#define GPIO_A_VIRT (GPIO_VIRT(0)) |
Definition at line 50 of file hardware.h.
#define GPIO_AMULSEL (GPIO_VIRT(0) + 0xA4) |
Definition at line 55 of file hardware.h.
#define GPIO_B_VIRT (GPIO_VIRT(1)) |
Definition at line 51 of file hardware.h.
#define GPIO_C_VIRT (GPIO_VIRT(2)) |
Definition at line 52 of file hardware.h.
#define GPIO_CLR 0x14 |
Definition at line 70 of file hardware.h.
#define GPIO_D_VIRT (GPIO_VIRT(3)) |
Definition at line 53 of file hardware.h.
#define GPIO_DATA 0x00 |
Definition at line 65 of file hardware.h.
#define GPIO_DIR 0x04 |
Definition at line 66 of file hardware.h.
#define GPIO_E_VIRT (GPIO_VIRT(4)) |
Definition at line 54 of file hardware.h.
#define GPIO_EDGE 0x10 |
Definition at line 69 of file hardware.h.
#define GPIO_EN 0x1C |
Definition at line 72 of file hardware.h.
#define GPIO_MASK 0x08 |
Definition at line 67 of file hardware.h.
#define GPIO_POL 0x18 |
Definition at line 71 of file hardware.h.
#define GPIO_STAT 0x0C |
Definition at line 68 of file hardware.h.
Definition at line 49 of file hardware.h.
#define IO_PHYS 0x80000000 |
Definition at line 27 of file hardware.h.
#define IO_SIZE 0x00050000 |
Definition at line 28 of file hardware.h.
#define IO_VIRT 0xf0000000 /* IO peripherals */ |
Definition at line 26 of file hardware.h.
#define IOCLK (3686400L) |
Definition at line 22 of file hardware.h.
#define IRQC_IER 0x00 |
Definition at line 77 of file hardware.h.
#define IRQC_ISR 0x04 |
Definition at line 78 of file hardware.h.
#define IRQC_VIRT (IO_VIRT + 0x24000) |
Definition at line 75 of file hardware.h.
#define LCD_BASE (IO_VIRT + 0x10000) |
Definition at line 141 of file hardware.h.
#define LCD_CTRL 0x00 |
Definition at line 142 of file hardware.h.
#define LCD_CTRL_BGR 0x00001000 |
Definition at line 162 of file hardware.h.
#define LCD_CTRL_LCD_16BPP 0x00000004 |
Definition at line 159 of file hardware.h.
#define LCD_CTRL_LCD_4BPP 0x00000000 |
Definition at line 157 of file hardware.h.
#define LCD_CTRL_LCD_8BPP 0x00000002 |
Definition at line 158 of file hardware.h.
#define LCD_CTRL_LCD_BLE 0x00800000 |
Definition at line 166 of file hardware.h.
#define LCD_CTRL_LCD_BPP_MASK 0x00000006 |
Definition at line 156 of file hardware.h.
#define LCD_CTRL_LCD_BW 0x00000008 |
Definition at line 160 of file hardware.h.
#define LCD_CTRL_LCD_ENABLE 0x00000001 |
Definition at line 154 of file hardware.h.
#define LCD_CTRL_LCD_MONO8 0x00200000 |
Definition at line 164 of file hardware.h.
#define LCD_CTRL_LCD_PWR 0x00400000 |
Definition at line 165 of file hardware.h.
#define LCD_CTRL_LCD_TFT 0x00000010 |
Definition at line 161 of file hardware.h.
#define LCD_CTRL_LCD_VCOMP 0x00080000 |
Definition at line 163 of file hardware.h.
#define LCD_CTRL_LDBUSEN 0x01000000 |
Definition at line 167 of file hardware.h.
#define LCD_DBAR 0x10 |
Definition at line 146 of file hardware.h.
#define LCD_DCAR 0x14 |
Definition at line 147 of file hardware.h.
#define LCD_INTERRUPT 0x0C |
Definition at line 145 of file hardware.h.
#define LCD_PALETTE_BASE (IO_VIRT + 0x10400) |
Definition at line 170 of file hardware.h.
#define LCD_STATUS 0x04 |
Definition at line 143 of file hardware.h.
#define LCD_STATUS_M 0x08 |
Definition at line 144 of file hardware.h.
#define LCD_TEST 0x40 |
Definition at line 151 of file hardware.h.
#define LCD_TIMING0 0x20 |
Definition at line 148 of file hardware.h.
#define LCD_TIMING1 0x24 |
Definition at line 149 of file hardware.h.
#define LCD_TIMING2 0x28 |
Definition at line 150 of file hardware.h.
#define PLL_1_EN 0x4000 |
Definition at line 133 of file hardware.h.
#define PLL_2_EN 0x8000 |
Definition at line 132 of file hardware.h.
#define PLL_3_MUTE 0x0080 |
Definition at line 134 of file hardware.h.
#define PLL_CTRL_MASK23 0x000080ff |
Definition at line 138 of file hardware.h.
#define PMU_BASE (IO_VIRT + 0x1000) |
Definition at line 117 of file hardware.h.
#define PMU_MODE 0x00 |
Definition at line 118 of file hardware.h.
#define PMU_MODE_DEEPSLEEP 0x07 |
Definition at line 128 of file hardware.h.
#define PMU_MODE_IDLE 0x02 |
Definition at line 125 of file hardware.h.
#define PMU_MODE_INIT 0x04 |
Definition at line 127 of file hardware.h.
#define PMU_MODE_RUN 0x01 |
Definition at line 124 of file hardware.h.
#define PMU_MODE_SLEEP 0x03 |
Definition at line 126 of file hardware.h.
#define PMU_MODE_SLOW 0x00 |
Definition at line 123 of file hardware.h.
#define PMU_MODE_WAKEUP 0x08 |
Definition at line 129 of file hardware.h.
#define PMU_PLL_CTRL 0x28 |
Definition at line 120 of file hardware.h.
#define PMU_STAT 0x20 |
Definition at line 119 of file hardware.h.
#define PMU_WARMRESET 0x00010000 |
Definition at line 137 of file hardware.h.
#define SERIAL0_BASE (IO_PHYS + SERIAL0_OFS) |
Definition at line 175 of file hardware.h.
#define SERIAL0_OFS 0x20000 |
Definition at line 173 of file hardware.h.
#define SERIAL0_VIRT (IO_VIRT + SERIAL0_OFS) |
Definition at line 174 of file hardware.h.
#define SERIAL1_BASE (IO_PHYS + SERIAL1_OFS) |
Definition at line 179 of file hardware.h.
#define SERIAL1_OFS 0x21000 |
Definition at line 177 of file hardware.h.
#define SERIAL1_VIRT (IO_VIRT + SERIAL1_OFS) |
Definition at line 178 of file hardware.h.
#define SERIAL_ENABLE 0x30 |
Definition at line 181 of file hardware.h.
#define SERIAL_ENABLE_EN (1<<0) |
Definition at line 182 of file hardware.h.
#define T64_BASEH 0x98 |
Definition at line 98 of file hardware.h.
#define T64_BASEL 0x94 |
Definition at line 97 of file hardware.h.
#define T64_COUNTH 0x84 |
Definition at line 95 of file hardware.h.
#define T64_COUNTL 0x80 |
Definition at line 94 of file hardware.h.
#define T64_CTRL 0x88 |
Definition at line 96 of file hardware.h.
#define TIMER_ENABLE_BIT 0x8 |
Definition at line 112 of file hardware.h.
#define TIMER_TOPCTRL 0x60 |
Definition at line 92 of file hardware.h.
#define TIMER_TOPSTAT 0x64 |
Definition at line 93 of file hardware.h.
#define TIMER_VIRT (IO_VIRT + 0x25000) |
Definition at line 81 of file hardware.h.
#define TM0_COUNT 0x08 |
Definition at line 84 of file hardware.h.
#define TM0_CTRL 0x10 |
Definition at line 85 of file hardware.h.
#define TM0_PERIOD 0x00 |
Definition at line 83 of file hardware.h.
#define TM1_COUNT 0x28 |
Definition at line 87 of file hardware.h.
#define TM1_CTRL 0x30 |
Definition at line 88 of file hardware.h.
#define TM1_PERIOD 0x20 |
Definition at line 86 of file hardware.h.
#define TM2_COUNT 0x48 |
Definition at line 90 of file hardware.h.
#define TM2_CTRL 0x50 |
Definition at line 91 of file hardware.h.
#define TM2_PERIOD 0x40 |
Definition at line 89 of file hardware.h.
#define TM_REPEAT 0x2 |
Definition at line 106 of file hardware.h.
#define TM_RESET 0x4 |
Definition at line 107 of file hardware.h.
#define TM_START 0x1 |
Definition at line 105 of file hardware.h.
#define TSTAT_T0INT 0x1 |
Definition at line 100 of file hardware.h.
#define TSTAT_T1INT 0x2 |
Definition at line 101 of file hardware.h.
#define TSTAT_T2INT 0x4 |
Definition at line 102 of file hardware.h.
#define TSTAT_T3INT 0x8 |
Definition at line 103 of file hardware.h.