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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include <mach/memory.h>Go to the source code of this file.
Macros | |
| #define | HAS_IOMD |
| #define | HAS_VIDC20 |
| #define | RAM_SIZE 0x10000000 |
| #define | RAM_START 0x10000000 |
| #define | EASI_SIZE 0x08000000 /* EASI I/O */ |
| #define | EASI_START 0x08000000 |
| #define | EASI_BASE IOMEM(0xe5000000) |
| #define | IO_START 0x03000000 /* I/O */ |
| #define | IO_SIZE 0x01000000 |
| #define | IO_BASE IOMEM(0xe0000000) |
| #define | SCREEN_START 0x02000000 /* VRAM */ |
| #define | SCREEN_END 0xdfc00000 |
| #define | SCREEN_BASE 0xdf800000 |
| #define | UNCACHEABLE_ADDR 0xdf010000 |
| #define | ECARD_EASI_BASE (EASI_BASE) |
| #define | VIDC_BASE (IO_BASE + 0x00400000) |
| #define | EXPMASK_BASE (IO_BASE + 0x00360000) |
| #define | ECARD_IOC4_BASE (IO_BASE + 0x00270000) |
| #define | ECARD_IOC_BASE (IO_BASE + 0x00240000) |
| #define | IOMD_BASE (IO_BASE + 0x00200000) |
| #define | IOC_BASE (IO_BASE + 0x00200000) |
| #define | ECARD_MEMC8_BASE (IO_BASE + 0x0002b000) |
| #define | FLOPPYDMA_BASE (IO_BASE + 0x0002a000) |
| #define | PCIO_BASE (IO_BASE + 0x00010000) |
| #define | ECARD_MEMC_BASE (IO_BASE + 0x00000000) |
| #define | vidc_writel(val) __raw_writel(val, VIDC_BASE) |
| #define | NETSLOT_BASE 0x0302b000 |
| #define | NETSLOT_SIZE 0x00001000 |
| #define | PODSLOT_IOC0_BASE 0x03240000 |
| #define | PODSLOT_IOC4_BASE 0x03270000 |
| #define | PODSLOT_IOC_SIZE (1 << 14) |
| #define | PODSLOT_MEMC_BASE 0x03000000 |
| #define | PODSLOT_MEMC_SIZE (1 << 14) |
| #define | PODSLOT_EASI_BASE 0x08000000 |
| #define | PODSLOT_EASI_SIZE (1 << 24) |
| #define | EXPMASK_STATUS (EXPMASK_BASE + 0x00) |
| #define | EXPMASK_ENABLE (EXPMASK_BASE + 0x04) |
| #define EASI_BASE IOMEM(0xe5000000) |
Definition at line 33 of file hardware.h.
| #define EASI_SIZE 0x08000000 /* EASI I/O */ |
Definition at line 31 of file hardware.h.
| #define EASI_START 0x08000000 |
Definition at line 32 of file hardware.h.
| #define ECARD_EASI_BASE (EASI_BASE) |
Definition at line 48 of file hardware.h.
| #define ECARD_IOC4_BASE (IO_BASE + 0x00270000) |
Definition at line 51 of file hardware.h.
| #define ECARD_IOC_BASE (IO_BASE + 0x00240000) |
Definition at line 52 of file hardware.h.
| #define ECARD_MEMC8_BASE (IO_BASE + 0x0002b000) |
Definition at line 55 of file hardware.h.
| #define ECARD_MEMC_BASE (IO_BASE + 0x00000000) |
Definition at line 58 of file hardware.h.
| #define EXPMASK_BASE (IO_BASE + 0x00360000) |
Definition at line 50 of file hardware.h.
| #define EXPMASK_ENABLE (EXPMASK_BASE + 0x04) |
Definition at line 74 of file hardware.h.
| #define EXPMASK_STATUS (EXPMASK_BASE + 0x00) |
Definition at line 73 of file hardware.h.
| #define FLOPPYDMA_BASE (IO_BASE + 0x0002a000) |
Definition at line 56 of file hardware.h.
| #define HAS_IOMD |
Definition at line 20 of file hardware.h.
| #define HAS_VIDC20 |
Definition at line 21 of file hardware.h.
| #define IO_BASE IOMEM(0xe0000000) |
Definition at line 37 of file hardware.h.
| #define IO_SIZE 0x01000000 |
Definition at line 36 of file hardware.h.
| #define IO_START 0x03000000 /* I/O */ |
Definition at line 35 of file hardware.h.
| #define IOC_BASE (IO_BASE + 0x00200000) |
Definition at line 54 of file hardware.h.
| #define IOMD_BASE (IO_BASE + 0x00200000) |
Definition at line 53 of file hardware.h.
| #define NETSLOT_BASE 0x0302b000 |
Definition at line 62 of file hardware.h.
| #define NETSLOT_SIZE 0x00001000 |
Definition at line 63 of file hardware.h.
| #define PCIO_BASE (IO_BASE + 0x00010000) |
Definition at line 57 of file hardware.h.
| #define PODSLOT_EASI_BASE 0x08000000 |
Definition at line 70 of file hardware.h.
| #define PODSLOT_EASI_SIZE (1 << 24) |
Definition at line 71 of file hardware.h.
| #define PODSLOT_IOC0_BASE 0x03240000 |
Definition at line 65 of file hardware.h.
| #define PODSLOT_IOC4_BASE 0x03270000 |
Definition at line 66 of file hardware.h.
| #define PODSLOT_IOC_SIZE (1 << 14) |
Definition at line 67 of file hardware.h.
| #define PODSLOT_MEMC_BASE 0x03000000 |
Definition at line 68 of file hardware.h.
| #define PODSLOT_MEMC_SIZE (1 << 14) |
Definition at line 69 of file hardware.h.
| #define RAM_SIZE 0x10000000 |
Definition at line 28 of file hardware.h.
| #define RAM_START 0x10000000 |
Definition at line 29 of file hardware.h.
| #define SCREEN_BASE 0xdf800000 |
Definition at line 41 of file hardware.h.
| #define SCREEN_END 0xdfc00000 |
Definition at line 40 of file hardware.h.
| #define SCREEN_START 0x02000000 /* VRAM */ |
Definition at line 39 of file hardware.h.
| #define UNCACHEABLE_ADDR 0xdf010000 |
Definition at line 43 of file hardware.h.
| #define VIDC_BASE (IO_BASE + 0x00400000) |
Definition at line 49 of file hardware.h.
| #define vidc_writel | ( | val | ) | __raw_writel(val, VIDC_BASE) |
Definition at line 60 of file hardware.h.
1.8.2