Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
clock.h
Go to the documentation of this file.
1 /*
2  * OMAP clock: data structure definitions, function prototypes, shared macros
3  *
4  * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation
5  * Written by Tuukka Tikkanen <[email protected]>
6  * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #ifndef __ARCH_ARM_OMAP_CLOCK_H
14 #define __ARCH_ARM_OMAP_CLOCK_H
15 
16 #include <linux/list.h>
17 
18 struct module;
19 struct clk;
20 struct clockdomain;
21 
22 /* Temporary, needed during the common clock framework conversion */
23 #define __clk_get_name(clk) (clk->name)
24 #define __clk_get_parent(clk) (clk->parent)
25 #define __clk_get_rate(clk) (clk->rate)
26 
45 struct clkops {
46  int (*enable)(struct clk *);
47  void (*disable)(struct clk *);
48  void (*find_idlest)(struct clk *, void __iomem **,
49  u8 *, u8 *);
50  void (*find_companion)(struct clk *, void __iomem **,
51  u8 *);
52  void (*allow_idle)(struct clk *);
53  void (*deny_idle)(struct clk *);
54 };
55 
56 #ifdef CONFIG_ARCH_OMAP2PLUS
57 
58 /* struct clksel_rate.flags possibilities */
59 #define RATE_IN_242X (1 << 0)
60 #define RATE_IN_243X (1 << 1)
61 #define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
62 #define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
63 #define RATE_IN_36XX (1 << 4)
64 #define RATE_IN_4430 (1 << 5)
65 #define RATE_IN_TI816X (1 << 6)
66 #define RATE_IN_4460 (1 << 7)
67 #define RATE_IN_AM33XX (1 << 8)
68 #define RATE_IN_TI814X (1 << 9)
69 
70 #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
71 #define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
72 #define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
73 #define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
74 
75 /* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
76 #define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
77 
78 
91 struct clksel_rate {
92  u32 val;
93  u8 div;
94  u16 flags;
95 };
96 
105 struct clksel {
106  struct clk *parent;
107  const struct clksel_rate *rates;
108 };
109 
149 struct dpll_data {
150  void __iomem *mult_div1_reg;
151  u32 mult_mask;
152  u32 div1_mask;
153  struct clk *clk_bypass;
154  struct clk *clk_ref;
155  void __iomem *control_reg;
157  unsigned long last_rounded_rate;
158  u16 last_rounded_m;
159  u16 max_multiplier;
160  u8 last_rounded_n;
161  u8 min_divider;
162  u16 max_divider;
163  u8 modes;
164  void __iomem *autoidle_reg;
165  void __iomem *idlest_reg;
166  u32 autoidle_mask;
167  u32 freqsel_mask;
168  u32 idlest_mask;
169  u32 dco_mask;
170  u32 sddiv_mask;
171  u8 auto_recal_bit;
172  u8 recal_en_bit;
173  u8 recal_st_bit;
174  u8 flags;
175 };
176 
177 #endif
178 
179 /*
180  * struct clk.flags possibilities
181  *
182  * XXX document the rest of the clock flags here
183  *
184  * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
185  * bits share the same register. This flag allows the
186  * omap4_dpllmx*() code to determine which GATE_CTRL bit field
187  * should be used. This is a temporary solution - a better approach
188  * would be to associate clock type-specific data with the clock,
189  * similar to the struct dpll_data approach.
190  */
191 #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
192 #define CLOCK_IDLE_CONTROL (1 << 1)
193 #define CLOCK_NO_IDLE_PARENT (1 << 2)
194 #define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
195 #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
196 #define CLOCK_CLKOUTX2 (1 << 5)
197 
245 struct clk {
246  struct list_head node;
247  const struct clkops *ops;
248  const char *name;
249  struct clk *parent;
250  struct list_head children;
251  struct list_head sibling; /* node for children */
252  unsigned long rate;
253  void __iomem *enable_reg;
254  unsigned long (*recalc)(struct clk *);
255  int (*set_rate)(struct clk *, unsigned long);
256  long (*round_rate)(struct clk *, unsigned long);
257  void (*init)(struct clk *);
262 #ifdef CONFIG_ARCH_OMAP2PLUS
263  void __iomem *clksel_reg;
264  u32 clksel_mask;
265  const struct clksel *clksel;
266  struct dpll_data *dpll_data;
267  const char *clkdm_name;
268  struct clockdomain *clkdm;
269 #else
272 #endif
273 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
274  struct dentry *dent; /* For visible tree hierarchy */
275 #endif
276 };
277 
279  int (*clk_enable)(struct clk *clk);
280  void (*clk_disable)(struct clk *clk);
281  long (*clk_round_rate)(struct clk *clk, unsigned long rate);
282  int (*clk_set_rate)(struct clk *clk, unsigned long rate);
283  int (*clk_set_parent)(struct clk *clk, struct clk *parent);
284  void (*clk_allow_idle)(struct clk *clk);
285  void (*clk_deny_idle)(struct clk *clk);
287 };
288 
289 extern int mpurate;
290 
291 extern int clk_init(struct clk_functions *custom_clocks);
292 extern void clk_preinit(struct clk *clk);
293 extern int clk_register(struct clk *clk);
294 extern void clk_reparent(struct clk *child, struct clk *parent);
295 extern void clk_unregister(struct clk *clk);
296 extern void propagate_rate(struct clk *clk);
297 extern void recalculate_root_clocks(void);
298 extern unsigned long followparent_recalc(struct clk *clk);
299 extern void clk_enable_init_clocks(void);
300 unsigned long omap_fixed_divisor_recalc(struct clk *clk);
301 extern struct clk *omap_clk_get_by_name(const char *name);
302 extern int omap_clk_enable_autoidle_all(void);
303 extern int omap_clk_disable_autoidle_all(void);
304 
305 extern const struct clkops clkops_null;
306 
307 extern struct clk dummy_ck;
308 
309 #endif