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13 #ifndef __ARCH_ARM_OMAP_CLOCK_H
14 #define __ARCH_ARM_OMAP_CLOCK_H
16 #include <linux/list.h>
23 #define __clk_get_name(clk) (clk->name)
24 #define __clk_get_parent(clk) (clk->parent)
25 #define __clk_get_rate(clk) (clk->rate)
56 #ifdef CONFIG_ARCH_OMAP2PLUS
59 #define RATE_IN_242X (1 << 0)
60 #define RATE_IN_243X (1 << 1)
61 #define RATE_IN_3430ES1 (1 << 2)
62 #define RATE_IN_3430ES2PLUS (1 << 3)
63 #define RATE_IN_36XX (1 << 4)
64 #define RATE_IN_4430 (1 << 5)
65 #define RATE_IN_TI816X (1 << 6)
66 #define RATE_IN_4460 (1 << 7)
67 #define RATE_IN_AM33XX (1 << 8)
68 #define RATE_IN_TI814X (1 << 9)
70 #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
71 #define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
72 #define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
73 #define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
76 #define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
107 const struct clksel_rate *rates;
153 struct clk *clk_bypass;
157 unsigned long last_rounded_rate;
191 #define ENABLE_REG_32BIT (1 << 0)
192 #define CLOCK_IDLE_CONTROL (1 << 1)
193 #define CLOCK_NO_IDLE_PARENT (1 << 2)
194 #define ENABLE_ON_INIT (1 << 3)
195 #define INVERT_ENABLE (1 << 4)
196 #define CLOCK_CLKOUTX2 (1 << 5)
262 #ifdef CONFIG_ARCH_OMAP2PLUS
265 const struct clksel *clksel;
266 struct dpll_data *dpll_data;
267 const char *clkdm_name;
273 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)