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8 #ifndef __ASM_AVR32_CACHEFLUSH_H
9 #define __ASM_AVR32_CACHEFLUSH_H
14 #define CACHE_OP_ICACHE_INVALIDATE 0x01
15 #define CACHE_OP_DCACHE_INVALIDATE 0x0b
16 #define CACHE_OP_DCACHE_CLEAN 0x0c
17 #define CACHE_OP_DCACHE_CLEAN_INVAL 0x0d
26 static inline void invalidate_dcache_line(
void *
vaddr)
28 asm volatile(
"cache %0[0], %1"
38 static inline void clean_dcache_line(
void *
vaddr)
40 asm volatile(
"cache %0[0], %1"
50 static inline void flush_dcache_line(
void *vaddr)
52 asm volatile(
"cache %0[0], %1"
62 static inline void invalidate_icache_line(
void *vaddr)
64 asm volatile(
"cache %0[0], %1"
82 #define flush_write_buffer() asm volatile("sync 0" : : : "memory")
88 #define flush_cache_all() do { } while (0)
89 #define flush_cache_mm(mm) do { } while (0)
90 #define flush_cache_dup_mm(mm) do { } while (0)
91 #define flush_cache_range(vma, start, end) do { } while (0)
92 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
93 #define flush_cache_vmap(start, end) do { } while (0)
94 #define flush_cache_vunmap(start, end) do { } while (0)
110 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
111 #define flush_dcache_page(page) do { } while (0)
112 #define flush_dcache_mmap_lock(page) do { } while (0)
113 #define flush_dcache_mmap_unlock(page) do { } while (0)
122 unsigned long vaddr,
void *
dst,
const void *
src,
127 const void *
src,
unsigned long len)