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pgtable.h
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1 /*
2  * Copyright (C) 2004-2006 Atmel Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 #ifndef __ASM_AVR32_PGTABLE_H
9 #define __ASM_AVR32_PGTABLE_H
10 
11 #include <asm/addrspace.h>
12 
13 #ifndef __ASSEMBLY__
14 #include <linux/sched.h>
15 
16 #endif /* !__ASSEMBLY__ */
17 
18 /*
19  * Use two-level page tables just as the i386 (without PAE)
20  */
21 #include <asm/pgtable-2level.h>
22 
23 /*
24  * The following code might need some cleanup when the values are
25  * final...
26  */
27 #define PMD_SIZE (1UL << PMD_SHIFT)
28 #define PMD_MASK (~(PMD_SIZE-1))
29 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
30 #define PGDIR_MASK (~(PGDIR_SIZE-1))
31 
32 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
33 #define FIRST_USER_ADDRESS 0
34 
35 #ifndef __ASSEMBLY__
37 extern void paging_init(void);
38 
39 /*
40  * ZERO_PAGE is a global shared page that is always zero: used for
41  * zero-mapped memory areas etc.
42  */
43 extern struct page *empty_zero_page;
44 #define ZERO_PAGE(vaddr) (empty_zero_page)
45 
46 /*
47  * Just any arbitrary offset to the start of the vmalloc VM area: the
48  * current 8 MiB value just means that there will be a 8 MiB "hole"
49  * after the uncached physical memory (P2 segment) until the vmalloc
50  * area starts. That means that any out-of-bounds memory accesses will
51  * hopefully be caught; we don't know if the end of the P1/P2 segments
52  * are actually used for anything, but it is anyway safer to let the
53  * MMU catch these kinds of errors than to rely on the memory bus.
54  *
55  * A "hole" of the same size is added to the end of the P3 segment as
56  * well. It might seem wasteful to use 16 MiB of virtual address space
57  * on this, but we do have 512 MiB of it...
58  *
59  * The vmalloc() routines leave a hole of 4 KiB between each vmalloced
60  * area for the same reason.
61  */
62 #define VMALLOC_OFFSET (8 * 1024 * 1024)
63 #define VMALLOC_START (P3SEG + VMALLOC_OFFSET)
64 #define VMALLOC_END (P4SEG - VMALLOC_OFFSET)
65 #endif /* !__ASSEMBLY__ */
66 
67 /*
68  * Page flags. Some of these flags are not directly supported by
69  * hardware, so we have to emulate them.
70  */
71 #define _TLBEHI_BIT_VALID 9
72 #define _TLBEHI_VALID (1 << _TLBEHI_BIT_VALID)
73 
74 #define _PAGE_BIT_WT 0 /* W-bit : write-through */
75 #define _PAGE_BIT_DIRTY 1 /* D-bit : page changed */
76 #define _PAGE_BIT_SZ0 2 /* SZ0-bit : Size of page */
77 #define _PAGE_BIT_SZ1 3 /* SZ1-bit : Size of page */
78 #define _PAGE_BIT_EXECUTE 4 /* X-bit : execute access allowed */
79 #define _PAGE_BIT_RW 5 /* AP0-bit : write access allowed */
80 #define _PAGE_BIT_USER 6 /* AP1-bit : user space access allowed */
81 #define _PAGE_BIT_BUFFER 7 /* B-bit : bufferable */
82 #define _PAGE_BIT_GLOBAL 8 /* G-bit : global (ignore ASID) */
83 #define _PAGE_BIT_CACHABLE 9 /* C-bit : cachable */
84 
85 /* If we drop support for 1K pages, we get two extra bits */
86 #define _PAGE_BIT_PRESENT 10
87 #define _PAGE_BIT_ACCESSED 11 /* software: page was accessed */
88 
89 /* The following flags are only valid when !PRESENT */
90 #define _PAGE_BIT_FILE 0 /* software: pagecache or swap? */
91 
92 #define _PAGE_WT (1 << _PAGE_BIT_WT)
93 #define _PAGE_DIRTY (1 << _PAGE_BIT_DIRTY)
94 #define _PAGE_EXECUTE (1 << _PAGE_BIT_EXECUTE)
95 #define _PAGE_RW (1 << _PAGE_BIT_RW)
96 #define _PAGE_USER (1 << _PAGE_BIT_USER)
97 #define _PAGE_BUFFER (1 << _PAGE_BIT_BUFFER)
98 #define _PAGE_GLOBAL (1 << _PAGE_BIT_GLOBAL)
99 #define _PAGE_CACHABLE (1 << _PAGE_BIT_CACHABLE)
100 
101 /* Software flags */
102 #define _PAGE_ACCESSED (1 << _PAGE_BIT_ACCESSED)
103 #define _PAGE_PRESENT (1 << _PAGE_BIT_PRESENT)
104 #define _PAGE_FILE (1 << _PAGE_BIT_FILE)
105 
106 /*
107  * Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is
108  * usually called _PAGE_PROTNONE on other architectures.
109  *
110  * XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If
111  * so, we can encode all possible page sizes (although we can't really
112  * support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED
113  * bits)
114  *
115  */
116 #define _PAGE_TYPE_MASK ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1))
117 #define _PAGE_TYPE_NONE (0 << _PAGE_BIT_SZ0)
118 #define _PAGE_TYPE_SMALL (1 << _PAGE_BIT_SZ0)
119 #define _PAGE_TYPE_MEDIUM (2 << _PAGE_BIT_SZ0)
120 #define _PAGE_TYPE_LARGE (3 << _PAGE_BIT_SZ0)
121 
122 /*
123  * Mask which drop software flags. We currently can't handle more than
124  * 512 MiB of physical memory, so we can use bits 29-31 for other
125  * stuff. With a fixed 4K page size, we can use bits 10-11 as well as
126  * bits 2-3 (SZ)
127  */
128 #define _PAGE_FLAGS_HARDWARE_MASK 0xfffff3ff
129 
130 #define _PAGE_FLAGS_CACHE_MASK (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT)
131 
132 /* Flags that may be modified by software */
133 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \
134  | _PAGE_FLAGS_CACHE_MASK)
135 
136 #define _PAGE_FLAGS_READ (_PAGE_CACHABLE | _PAGE_BUFFER)
137 #define _PAGE_FLAGS_WRITE (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY)
138 
139 #define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \
140  | _PAGE_ACCESSED)
141 
142 #define PAGE_NONE (_PAGE_ACCESSED | _PAGE_TYPE_NONE)
143 #define PAGE_READ (_PAGE_FLAGS_READ | _PAGE_USER)
144 #define PAGE_EXEC (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER)
145 #define PAGE_WRITE (_PAGE_FLAGS_WRITE | _PAGE_USER)
146 #define PAGE_KERNEL _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL)
147 #define PAGE_KERNEL_RO _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL)
148 
149 #define _PAGE_P(x) _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY))
150 #define _PAGE_S(x) _PAGE_NORMAL(x)
151 
152 #define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
153 #define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
154 
155 #ifndef __ASSEMBLY__
156 /*
157  * The hardware supports flags for write- and execute access. Read is
158  * always allowed if the page is loaded into the TLB, so the "-w-",
159  * "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx",
160  * respectively.
161  *
162  * The "---" case is handled by software; the page will simply not be
163  * loaded into the TLB if the page type is _PAGE_TYPE_NONE.
164  */
165 
166 #define __P000 __pgprot(PAGE_NONE)
167 #define __P001 _PAGE_P(PAGE_READ)
168 #define __P010 _PAGE_P(PAGE_WRITE)
169 #define __P011 _PAGE_P(PAGE_WRITE | PAGE_READ)
170 #define __P100 _PAGE_P(PAGE_EXEC)
171 #define __P101 _PAGE_P(PAGE_EXEC | PAGE_READ)
172 #define __P110 _PAGE_P(PAGE_EXEC | PAGE_WRITE)
173 #define __P111 _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
174 
175 #define __S000 __pgprot(PAGE_NONE)
176 #define __S001 _PAGE_S(PAGE_READ)
177 #define __S010 _PAGE_S(PAGE_WRITE)
178 #define __S011 _PAGE_S(PAGE_WRITE | PAGE_READ)
179 #define __S100 _PAGE_S(PAGE_EXEC)
180 #define __S101 _PAGE_S(PAGE_EXEC | PAGE_READ)
181 #define __S110 _PAGE_S(PAGE_EXEC | PAGE_WRITE)
182 #define __S111 _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
183 
184 #define pte_none(x) (!pte_val(x))
185 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
186 
187 #define pte_clear(mm,addr,xp) \
188  do { \
189  set_pte_at(mm, addr, xp, __pte(0)); \
190  } while (0)
191 
192 /*
193  * The following only work if pte_present() is true.
194  * Undefined behaviour if not..
195  */
196 static inline int pte_write(pte_t pte)
197 {
198  return pte_val(pte) & _PAGE_RW;
199 }
200 static inline int pte_dirty(pte_t pte)
201 {
202  return pte_val(pte) & _PAGE_DIRTY;
203 }
204 static inline int pte_young(pte_t pte)
205 {
206  return pte_val(pte) & _PAGE_ACCESSED;
207 }
208 static inline int pte_special(pte_t pte)
209 {
210  return 0;
211 }
212 
213 /*
214  * The following only work if pte_present() is not true.
215  */
216 static inline int pte_file(pte_t pte)
217 {
218  return pte_val(pte) & _PAGE_FILE;
219 }
220 
221 /* Mutator functions for PTE bits */
222 static inline pte_t pte_wrprotect(pte_t pte)
223 {
224  set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
225  return pte;
226 }
227 static inline pte_t pte_mkclean(pte_t pte)
228 {
229  set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
230  return pte;
231 }
232 static inline pte_t pte_mkold(pte_t pte)
233 {
234  set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
235  return pte;
236 }
237 static inline pte_t pte_mkwrite(pte_t pte)
238 {
239  set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
240  return pte;
241 }
242 static inline pte_t pte_mkdirty(pte_t pte)
243 {
244  set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
245  return pte;
246 }
247 static inline pte_t pte_mkyoung(pte_t pte)
248 {
249  set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
250  return pte;
251 }
252 static inline pte_t pte_mkspecial(pte_t pte)
253 {
254  return pte;
255 }
256 
257 #define pmd_none(x) (!pmd_val(x))
258 #define pmd_present(x) (pmd_val(x))
259 
260 static inline void pmd_clear(pmd_t *pmdp)
261 {
262  set_pmd(pmdp, __pmd(0));
263 }
264 
265 #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
266 
267 /*
268  * Permanent address of a page. We don't support highmem, so this is
269  * trivial.
270  */
271 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
272 #define pte_page(x) (pfn_to_page(pte_pfn(x)))
273 
274 /*
275  * Mark the prot value as uncacheable and unbufferable
276  */
277 #define pgprot_noncached(prot) \
278  __pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE))
279 
280 /*
281  * Mark the prot value as uncacheable but bufferable
282  */
283 #define pgprot_writecombine(prot) \
284  __pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER)
285 
286 /*
287  * Conversion functions: convert a page and protection to a page entry,
288  * and a page entry and page directory to the page they refer to.
289  *
290  * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
291  */
292 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
293 
294 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
295 {
296  set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK)
297  | pgprot_val(newprot)));
298  return pte;
299 }
300 
301 #define page_pte(page) page_pte_prot(page, __pgprot(0))
302 
303 #define pmd_page_vaddr(pmd) pmd_val(pmd)
304 #define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
305 
306 /* to find an entry in a page-table-directory. */
307 #define pgd_index(address) (((address) >> PGDIR_SHIFT) \
308  & (PTRS_PER_PGD - 1))
309 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
310 
311 /* to find an entry in a kernel page-table-directory */
312 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
313 
314 /* Find an entry in the third-level page table.. */
315 #define pte_index(address) \
316  ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
317 #define pte_offset(dir, address) \
318  ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
319 #define pte_offset_kernel(dir, address) \
320  ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
321 #define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
322 #define pte_unmap(pte) do { } while (0)
323 
324 struct vm_area_struct;
325 extern void update_mmu_cache(struct vm_area_struct * vma,
326  unsigned long address, pte_t *ptep);
327 
328 /*
329  * Encode and decode a swap entry
330  *
331  * Constraints:
332  * _PAGE_FILE at bit 0
333  * _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE)
334  * _PAGE_PRESENT at bit 10
335  *
336  * We encode the type into bits 4-9 and offset into bits 11-31. This
337  * gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per
338  * device, and 64 possible types.
339  *
340  * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
341  * and _PAGE_PROTNONE bits
342  */
343 #define __swp_type(x) (((x).val >> 4) & 0x3f)
344 #define __swp_offset(x) ((x).val >> 11)
345 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
346 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
347 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
348 
349 /*
350  * Encode and decode a nonlinear file mapping entry. We have to
351  * preserve _PAGE_FILE and _PAGE_PRESENT here. _PAGE_TYPE_* isn't
352  * necessary, since _PAGE_FILE implies !_PAGE_PROTNONE (?)
353  */
354 #define PTE_FILE_MAX_BITS 30
355 #define pte_to_pgoff(pte) (((pte_val(pte) >> 1) & 0x1ff) \
356  | ((pte_val(pte) >> 11) << 9))
357 #define pgoff_to_pte(off) ((pte_t) { ((((off) & 0x1ff) << 1) \
358  | (((off) >> 9) << 11) \
359  | _PAGE_FILE) })
360 
361 typedef pte_t *pte_addr_t;
362 
363 #define kern_addr_valid(addr) (1)
364 
365 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
366  remap_pfn_range(vma, vaddr, pfn, size, prot)
367 
368 /* No page table caches to initialize (?) */
369 #define pgtable_cache_init() do { } while(0)
370 
371 #include <asm-generic/pgtable.h>
372 
373 #endif /* !__ASSEMBLY__ */
374 
375 #endif /* __ASM_AVR32_PGTABLE_H */