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#define | IA64_MAX_PHYS_BITS 50 /* max. number of physical address bits (architected) */ |
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#define | _PAGE_P_BIT 0 |
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#define | _PAGE_A_BIT 5 |
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#define | _PAGE_D_BIT 6 |
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#define | _PAGE_P (1 << _PAGE_P_BIT) /* page present bit */ |
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#define | _PAGE_MA_WB (0x0 << 2) /* write back memory attribute */ |
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#define | _PAGE_MA_UC (0x4 << 2) /* uncacheable memory attribute */ |
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#define | _PAGE_MA_UCE (0x5 << 2) /* UC exported attribute */ |
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#define | _PAGE_MA_WC (0x6 << 2) /* write coalescing memory attribute */ |
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#define | _PAGE_MA_NAT (0x7 << 2) /* not-a-thing attribute */ |
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#define | _PAGE_MA_MASK (0x7 << 2) |
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#define | _PAGE_PL_0 (0 << 7) /* privilege level 0 (kernel) */ |
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#define | _PAGE_PL_1 (1 << 7) /* privilege level 1 (unused) */ |
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#define | _PAGE_PL_2 (2 << 7) /* privilege level 2 (unused) */ |
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#define | _PAGE_PL_3 (3 << 7) /* privilege level 3 (user) */ |
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#define | _PAGE_PL_MASK (3 << 7) |
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#define | _PAGE_AR_R (0 << 9) /* read only */ |
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#define | _PAGE_AR_RX (1 << 9) /* read & execute */ |
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#define | _PAGE_AR_RW (2 << 9) /* read & write */ |
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#define | _PAGE_AR_RWX (3 << 9) /* read, write & execute */ |
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#define | _PAGE_AR_R_RW (4 << 9) /* read / read & write */ |
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#define | _PAGE_AR_RX_RWX (5 << 9) /* read & exec / read, write & exec */ |
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#define | _PAGE_AR_RWX_RW (6 << 9) /* read, write & exec / read & write */ |
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#define | _PAGE_AR_X_RX (7 << 9) /* exec & promote / read & exec */ |
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#define | _PAGE_AR_MASK (7 << 9) |
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#define | _PAGE_AR_SHIFT 9 |
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#define | _PAGE_A (1 << _PAGE_A_BIT) /* page accessed bit */ |
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#define | _PAGE_D (1 << _PAGE_D_BIT) /* page dirty bit */ |
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#define | _PAGE_PPN_MASK (((__IA64_UL(1) << IA64_MAX_PHYS_BITS) - 1) & ~0xfffUL) |
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#define | _PAGE_ED (__IA64_UL(1) << 52) /* exception deferral */ |
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#define | _PAGE_PROTNONE (__IA64_UL(1) << 63) |
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#define | _PAGE_FILE (1 << 1) /* see swap & file pte remarks below */ |
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#define | _PFN_MASK _PAGE_PPN_MASK |
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#define | _PAGE_CHG_MASK (_PAGE_P | _PAGE_PROTNONE | _PAGE_PL_MASK | _PAGE_AR_MASK | _PAGE_ED) |
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#define | _PAGE_SIZE_4K 12 |
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#define | _PAGE_SIZE_8K 13 |
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#define | _PAGE_SIZE_16K 14 |
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#define | _PAGE_SIZE_64K 16 |
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#define | _PAGE_SIZE_256K 18 |
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#define | _PAGE_SIZE_1M 20 |
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#define | _PAGE_SIZE_4M 22 |
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#define | _PAGE_SIZE_16M 24 |
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#define | _PAGE_SIZE_64M 26 |
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#define | _PAGE_SIZE_256M 28 |
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#define | _PAGE_SIZE_1G 30 |
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#define | _PAGE_SIZE_4G 32 |
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#define | __ACCESS_BITS _PAGE_ED | _PAGE_A | _PAGE_P | _PAGE_MA_WB |
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#define | __DIRTY_BITS_NO_ED _PAGE_A | _PAGE_P | _PAGE_D | _PAGE_MA_WB |
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#define | __DIRTY_BITS _PAGE_ED | __DIRTY_BITS_NO_ED |
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#define | PTRS_PER_PTD_SHIFT (PAGE_SHIFT-3) |
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#define | PTRS_PER_PTE (__IA64_UL(1) << (PTRS_PER_PTD_SHIFT)) |
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#define | PMD_SHIFT (PAGE_SHIFT + (PTRS_PER_PTD_SHIFT)) |
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#define | PMD_SIZE (1UL << PMD_SHIFT) |
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#define | PMD_MASK (~(PMD_SIZE-1)) |
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#define | PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT)) |
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#define | PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) |
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#define | PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT) |
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#define | PGDIR_MASK (~(PGDIR_SIZE-1)) |
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#define | PTRS_PER_PGD_SHIFT PTRS_PER_PTD_SHIFT |
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#define | PTRS_PER_PGD (1UL << PTRS_PER_PGD_SHIFT) |
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#define | USER_PTRS_PER_PGD (5*PTRS_PER_PGD/8) /* regions 0-4 are user regions */ |
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#define | FIRST_USER_ADDRESS 0 |
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#define | PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_A) |
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#define | PAGE_SHARED __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RW) |
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#define | PAGE_READONLY __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_R) |
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#define | PAGE_COPY __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_R) |
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#define | PAGE_COPY_EXEC __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX) |
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#define | PAGE_GATE __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_X_RX) |
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#define | PAGE_KERNEL __pgprot(__DIRTY_BITS | _PAGE_PL_0 | _PAGE_AR_RWX) |
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#define | PAGE_KERNELRX __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_RX) |
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#define | PAGE_KERNEL_UC |
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#define | __P000 PAGE_NONE |
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#define | __P001 PAGE_READONLY |
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#define | __P010 PAGE_READONLY /* write to priv pg -> copy & make writable */ |
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#define | __P011 PAGE_READONLY /* ditto */ |
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#define | __P100 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_X_RX) |
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#define | __P101 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX) |
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#define | __P110 PAGE_COPY_EXEC |
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#define | __P111 PAGE_COPY_EXEC |
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#define | __S000 PAGE_NONE |
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#define | __S001 PAGE_READONLY |
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#define | __S010 PAGE_SHARED /* we don't have (and don't need) write-only */ |
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#define | __S011 PAGE_SHARED |
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#define | __S100 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_X_RX) |
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#define | __S101 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX) |
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#define | __S110 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) |
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#define | __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) |
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#define | pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) |
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#define | pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) |
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#define | pte_ERROR(e) printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) |
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#define | kern_addr_valid(addr) (1) |
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#define | VMALLOC_START (RGN_BASE(RGN_GATE) + 0x200000000UL) |
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#define | VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9))) |
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#define | kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE)) |
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#define | kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE)) |
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#define | RGN_MAP_SHIFT (PGDIR_SHIFT + PTRS_PER_PGD_SHIFT - 3) |
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#define | RGN_MAP_LIMIT ((1UL << RGN_MAP_SHIFT) - PAGE_SIZE) /* per region addr limit */ |
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#define | pfn_pte(pfn, pgprot) ({ pte_t __pte; pte_val(__pte) = ((pfn) << PAGE_SHIFT) | pgprot_val(pgprot); __pte; }) |
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#define | pte_pfn(_pte) ((pte_val(_pte) & _PFN_MASK) >> PAGE_SHIFT) |
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#define | mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) |
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#define | mk_pte_phys(physpage, pgprot) ({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; }) |
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#define | pte_modify(_pte, newprot) (__pte((pte_val(_pte) & ~_PAGE_CHG_MASK) | (pgprot_val(newprot) & _PAGE_CHG_MASK))) |
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#define | pte_none(pte) (!pte_val(pte)) |
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#define | pte_present(pte) (pte_val(pte) & (_PAGE_P | _PAGE_PROTNONE)) |
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#define | pte_clear(mm, addr, pte) (pte_val(*(pte)) = 0UL) |
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#define | pte_page(pte) virt_to_page(((pte_val(pte) & _PFN_MASK) + PAGE_OFFSET)) |
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#define | pmd_none(pmd) (!pmd_val(pmd)) |
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#define | pmd_bad(pmd) (!ia64_phys_addr_valid(pmd_val(pmd))) |
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#define | pmd_present(pmd) (pmd_val(pmd) != 0UL) |
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#define | pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL) |
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#define | pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & _PFN_MASK)) |
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#define | pmd_page(pmd) virt_to_page((pmd_val(pmd) + PAGE_OFFSET)) |
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#define | pud_none(pud) (!pud_val(pud)) |
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#define | pud_bad(pud) (!ia64_phys_addr_valid(pud_val(pud))) |
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#define | pud_present(pud) (pud_val(pud) != 0UL) |
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#define | pud_clear(pudp) (pud_val(*(pudp)) = 0UL) |
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#define | pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK)) |
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#define | pud_page(pud) virt_to_page((pud_val(pud) + PAGE_OFFSET)) |
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#define | pte_write(pte) ((unsigned) (((pte_val(pte) & _PAGE_AR_MASK) >> _PAGE_AR_SHIFT) - 2) <= 4) |
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#define | pte_exec(pte) ((pte_val(pte) & _PAGE_AR_RX) != 0) |
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#define | pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0) |
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#define | pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0) |
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#define | pte_file(pte) ((pte_val(pte) & _PAGE_FILE) != 0) |
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#define | pte_special(pte) 0 |
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#define | pte_wrprotect(pte) (__pte(pte_val(pte) & ~_PAGE_AR_RW)) |
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#define | pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_AR_RW)) |
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#define | pte_mkold(pte) (__pte(pte_val(pte) & ~_PAGE_A)) |
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#define | pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A)) |
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#define | pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D)) |
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#define | pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D)) |
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#define | pte_mkhuge(pte) (__pte(pte_val(pte))) |
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#define | pte_mkspecial(pte) (pte) |
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#define | pte_present_exec_user(pte) |
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#define | set_pte_at(mm, addr, ptep, pteval) set_pte(ptep,pteval) |
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#define | pgprot_cacheable(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WB) |
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#define | pgprot_noncached(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_UC) |
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#define | pgprot_writecombine(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WC) |
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#define | __HAVE_PHYS_MEM_ACCESS_PROT |
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#define | pgd_offset_k(addr) (init_mm.pgd + (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))) |
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#define | pgd_offset_gate(mm, addr) pgd_offset_k(addr) |
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#define | pmd_offset(dir, addr) ((pmd_t *) pud_page_vaddr(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) |
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#define | pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) |
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#define | pte_offset_kernel(dir, addr) ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr)) |
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#define | pte_offset_map(dir, addr) pte_offset_kernel(dir, addr) |
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#define | pte_unmap(pte) do { } while (0) |
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#define | update_mmu_cache(vma, address, ptep) do { } while (0) |
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#define | __swp_type(entry) (((entry).val >> 2) & 0x7f) |
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#define | __swp_offset(entry) (((entry).val << 1) >> 10) |
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#define | __swp_entry(type, offset) ((swp_entry_t) { ((type) << 2) | ((long) (offset) << 9) }) |
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#define | __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) |
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#define | __swp_entry_to_pte(x) ((pte_t) { (x).val }) |
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#define | PTE_FILE_MAX_BITS 61 |
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#define | pte_to_pgoff(pte) ((pte_val(pte) << 1) >> 3) |
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#define | pgoff_to_pte(off) ((pte_t) { ((off) << 2) | _PAGE_FILE }) |
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#define | io_remap_pfn_range(vma, vaddr, pfn, size, prot) remap_pfn_range(vma, vaddr, pfn, size, prot) |
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#define | ZERO_PAGE(vaddr) (zero_page_memmap_ptr) |
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#define | HAVE_ARCH_UNMAPPED_AREA |
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#define | __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
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#define | ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) |
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#define | IA64_GRANULE_SIZE (1 << IA64_GRANULE_SHIFT) |
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#define | KERNEL_TR_PAGE_SHIFT _PAGE_SIZE_64M |
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#define | KERNEL_TR_PAGE_SIZE (1 << KERNEL_TR_PAGE_SHIFT) |
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#define | pgtable_cache_init() do { } while (0) |
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#define | FIXADDR_USER_START GATE_ADDR |
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#define | FIXADDR_USER_END (GATE_ADDR + 2*PERCPU_PAGE_SIZE) |
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#define | __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG |
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#define | __HAVE_ARCH_PTEP_GET_AND_CLEAR |
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#define | __HAVE_ARCH_PTEP_SET_WRPROTECT |
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#define | __HAVE_ARCH_PTE_SAME |
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#define | __HAVE_ARCH_PGD_OFFSET_GATE |
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