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io.h
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1 #ifndef _ASM_ARCH_CRIS_IO_H
2 #define _ASM_ARCH_CRIS_IO_H
3 
4 #include <linux/spinlock.h>
5 #include <hwregs/reg_map.h>
6 #include <hwregs/reg_rdwr.h>
7 #include <hwregs/gio_defs.h>
8 
10 {
13 };
14 
16 {
17  volatile unsigned long *oe;
18  volatile unsigned long *data;
19  volatile unsigned long *data_in;
20  unsigned int pin_count;
22 };
23 
25 {
27  int bit;
28 };
29 
30 extern struct crisv32_ioport crisv32_ioports[];
31 
32 extern struct crisv32_iopin crisv32_led1_green;
33 extern struct crisv32_iopin crisv32_led1_red;
34 extern struct crisv32_iopin crisv32_led2_green;
35 extern struct crisv32_iopin crisv32_led2_red;
36 extern struct crisv32_iopin crisv32_led3_green;
37 extern struct crisv32_iopin crisv32_led3_red;
38 
43 
44 static inline void crisv32_io_set(struct crisv32_iopin *iopin, int val)
45 {
46  unsigned long flags;
47  spin_lock_irqsave(&iopin->port->lock, flags);
48 
49  if (iopin->port->data) {
50  if (val)
51  *iopin->port->data |= iopin->bit;
52  else
53  *iopin->port->data &= ~iopin->bit;
54  }
55 
56  spin_unlock_irqrestore(&iopin->port->lock, flags);
57 }
58 
59 static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
60  enum crisv32_io_dir dir)
61 {
62  unsigned long flags;
63  spin_lock_irqsave(&iopin->port->lock, flags);
64 
65  if (iopin->port->oe) {
66  if (dir == crisv32_io_dir_in)
67  *iopin->port->oe &= ~iopin->bit;
68  else
69  *iopin->port->oe |= iopin->bit;
70  }
71 
72  spin_unlock_irqrestore(&iopin->port->lock, flags);
73 }
74 
75 static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
76 {
77  return ((*iopin->port->data_in & iopin->bit) ? 1 : 0);
78 }
79 
80 int crisv32_io_get(struct crisv32_iopin* iopin,
81  unsigned int port, unsigned int pin);
82 int crisv32_io_get_name(struct crisv32_iopin* iopin,
83  const char *name);
84 
85 #define CRIS_LED_OFF 0x00
86 #define CRIS_LED_GREEN 0x01
87 #define CRIS_LED_RED 0x02
88 #define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
89 
90 #if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
91 #define CRIS_LED_NETWORK_GRP0_SET(x) \
92  do { \
93  CRIS_LED_NETWORK_GRP0_SET_G((x) & CRIS_LED_GREEN); \
94  CRIS_LED_NETWORK_GRP0_SET_R((x) & CRIS_LED_RED); \
95  } while (0)
96 #else
97 #define CRIS_LED_NETWORK_GRP0_SET(x) while (0) {}
98 #endif
99 
100 #define CRIS_LED_NETWORK_GRP0_SET_G(x) \
101  crisv32_io_set(&crisv32_led_net0_green, !(x));
102 
103 #define CRIS_LED_NETWORK_GRP0_SET_R(x) \
104  crisv32_io_set(&crisv32_led_net0_red, !(x));
105 
106 #if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
107 #define CRIS_LED_NETWORK_GRP1_SET(x) \
108  do { \
109  CRIS_LED_NETWORK_GRP1_SET_G((x) & CRIS_LED_GREEN); \
110  CRIS_LED_NETWORK_GRP1_SET_R((x) & CRIS_LED_RED); \
111  } while (0)
112 #else
113 #define CRIS_LED_NETWORK_GRP1_SET(x) while (0) {}
114 #endif
115 
116 #define CRIS_LED_NETWORK_GRP1_SET_G(x) \
117  crisv32_io_set(&crisv32_led_net1_green, !(x));
118 
119 #define CRIS_LED_NETWORK_GRP1_SET_R(x) \
120  crisv32_io_set(&crisv32_led_net1_red, !(x));
121 
122 #define CRIS_LED_ACTIVE_SET(x) \
123  do { \
124  CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
125  CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
126  } while (0)
127 
128 #define CRIS_LED_ACTIVE_SET_G(x) \
129  crisv32_io_set(&crisv32_led2_green, !(x));
130 #define CRIS_LED_ACTIVE_SET_R(x) \
131  crisv32_io_set(&crisv32_led2_red, !(x));
132 #define CRIS_LED_DISK_WRITE(x) \
133  do{\
134  crisv32_io_set(&crisv32_led3_green, !(x)); \
135  crisv32_io_set(&crisv32_led3_red, !(x)); \
136  }while(0)
137 #define CRIS_LED_DISK_READ(x) \
138  crisv32_io_set(&crisv32_led3_green, !(x));
139 
140 #endif