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Macros
iop_sw_spu_defs_asm.h File Reference

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Macros

#define REG_FIELD(scope, reg, field, value)   REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
 
#define REG_FIELD_X_(value, shift)   ((value) << shift)
 
#define REG_STATE(scope, reg, field, symbolic_value)   REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
 
#define REG_STATE_X_(k, shift)   (k << shift)
 
#define REG_MASK(scope, reg, field)   REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
 
#define REG_MASK_X_(width, lsb)   (((1 << width)-1) << lsb)
 
#define REG_LSB(scope, reg, field)   reg_##scope##_##reg##___##field##___lsb
 
#define REG_BIT(scope, reg, field)   reg_##scope##_##reg##___##field##___bit
 
#define REG_ADDR(scope, inst, reg)   REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
 
#define REG_ADDR_X_(inst, offs)   ((inst) + offs)
 
#define REG_ADDR_VECT(scope, inst, reg, index)
 
#define REG_ADDR_VECT_X_(inst, offs, index, stride)   ((inst) + offs + (index) * stride)
 
#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___lsb   0
 
#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___width   1
 
#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___bit   0
 
#define reg_iop_sw_spu_rw_mc_ctrl___cmd___lsb   1
 
#define reg_iop_sw_spu_rw_mc_ctrl___cmd___width   2
 
#define reg_iop_sw_spu_rw_mc_ctrl___size___lsb   3
 
#define reg_iop_sw_spu_rw_mc_ctrl___size___width   3
 
#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu0_mem___lsb   6
 
#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu0_mem___width   1
 
#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu0_mem___bit   6
 
#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu1_mem___lsb   7
 
#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu1_mem___width   1
 
#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu1_mem___bit   7
 
#define reg_iop_sw_spu_rw_mc_ctrl_offset   0
 
#define reg_iop_sw_spu_rw_mc_data___val___lsb   0
 
#define reg_iop_sw_spu_rw_mc_data___val___width   32
 
#define reg_iop_sw_spu_rw_mc_data_offset   4
 
#define reg_iop_sw_spu_rw_mc_addr_offset   8
 
#define reg_iop_sw_spu_rs_mc_data_offset   12
 
#define reg_iop_sw_spu_r_mc_data_offset   16
 
#define reg_iop_sw_spu_r_mc_stat___busy_cpu___lsb   0
 
#define reg_iop_sw_spu_r_mc_stat___busy_cpu___width   1
 
#define reg_iop_sw_spu_r_mc_stat___busy_cpu___bit   0
 
#define reg_iop_sw_spu_r_mc_stat___busy_mpu___lsb   1
 
#define reg_iop_sw_spu_r_mc_stat___busy_mpu___width   1
 
#define reg_iop_sw_spu_r_mc_stat___busy_mpu___bit   1
 
#define reg_iop_sw_spu_r_mc_stat___busy_spu0___lsb   2
 
#define reg_iop_sw_spu_r_mc_stat___busy_spu0___width   1
 
#define reg_iop_sw_spu_r_mc_stat___busy_spu0___bit   2
 
#define reg_iop_sw_spu_r_mc_stat___busy_spu1___lsb   3
 
#define reg_iop_sw_spu_r_mc_stat___busy_spu1___width   1
 
#define reg_iop_sw_spu_r_mc_stat___busy_spu1___bit   3
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___lsb   4
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___width   1
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___bit   4
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___lsb   5
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___width   1
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___bit   5
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_spu0___lsb   6
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_spu0___width   1
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_spu0___bit   6
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_spu1___lsb   7
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_spu1___width   1
 
#define reg_iop_sw_spu_r_mc_stat___owned_by_spu1___bit   7
 
#define reg_iop_sw_spu_r_mc_stat_offset   20
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte2___lsb   16
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte3___lsb   24
 
#define reg_iop_sw_spu_rw_bus0_clr_mask___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_offset   24
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte2___lsb   16
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte3___lsb   24
 
#define reg_iop_sw_spu_rw_bus0_set_mask___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask_offset   28
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte0___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte0___bit   0
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte1___lsb   1
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte1___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte1___bit   1
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte2___lsb   2
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte2___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte2___bit   2
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte3___lsb   3
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte3___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte3___bit   3
 
#define reg_iop_sw_spu_rw_bus0_oe_clr_mask_offset   32
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte0___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte0___bit   0
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte1___lsb   1
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte1___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte1___bit   1
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte2___lsb   2
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte2___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte2___bit   2
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte3___lsb   3
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte3___width   1
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte3___bit   3
 
#define reg_iop_sw_spu_rw_bus0_oe_set_mask_offset   36
 
#define reg_iop_sw_spu_r_bus0_in_offset   40
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte2___lsb   16
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte3___lsb   24
 
#define reg_iop_sw_spu_rw_bus1_clr_mask___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_offset   44
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte2___lsb   16
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte3___lsb   24
 
#define reg_iop_sw_spu_rw_bus1_set_mask___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask_offset   48
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte0___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte0___bit   0
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte1___lsb   1
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte1___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte1___bit   1
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte2___lsb   2
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte2___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte2___bit   2
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte3___lsb   3
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte3___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte3___bit   3
 
#define reg_iop_sw_spu_rw_bus1_oe_clr_mask_offset   52
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte0___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte0___bit   0
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte1___lsb   1
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte1___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte1___bit   1
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte2___lsb   2
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte2___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte2___bit   2
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte3___lsb   3
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte3___width   1
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte3___bit   3
 
#define reg_iop_sw_spu_rw_bus1_oe_set_mask_offset   56
 
#define reg_iop_sw_spu_r_bus1_in_offset   60
 
#define reg_iop_sw_spu_rw_gio_clr_mask___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_clr_mask___val___width   32
 
#define reg_iop_sw_spu_rw_gio_clr_mask_offset   64
 
#define reg_iop_sw_spu_rw_gio_set_mask___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_set_mask___val___width   32
 
#define reg_iop_sw_spu_rw_gio_set_mask_offset   68
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___width   32
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask_offset   72
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___width   32
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask_offset   76
 
#define reg_iop_sw_spu_r_gio_in_offset   80
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_lo_offset   84
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte2___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte3___lsb   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus0_clr_mask_hi_offset   88
 
#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask_lo_offset   92
 
#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte2___lsb   0
 
#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte3___lsb   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus0_set_mask_hi_offset   96
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_lo_offset   100
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte2___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte3___lsb   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus1_clr_mask_hi_offset   104
 
#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte0___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte0___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte1___lsb   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte1___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask_lo_offset   108
 
#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte2___lsb   0
 
#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte2___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte3___lsb   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte3___width   8
 
#define reg_iop_sw_spu_rw_bus1_set_mask_hi_offset   112
 
#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___width   16
 
#define reg_iop_sw_spu_rw_gio_clr_mask_lo_offset   116
 
#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___width   16
 
#define reg_iop_sw_spu_rw_gio_clr_mask_hi_offset   120
 
#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___width   16
 
#define reg_iop_sw_spu_rw_gio_set_mask_lo_offset   124
 
#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___width   16
 
#define reg_iop_sw_spu_rw_gio_set_mask_hi_offset   128
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___width   16
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo_offset   132
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___width   16
 
#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi_offset   136
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___width   16
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo_offset   140
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___lsb   0
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___width   16
 
#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset   144
 
#define reg_iop_sw_spu_rw_cpu_intr___intr0___lsb   0
 
#define reg_iop_sw_spu_rw_cpu_intr___intr0___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr0___bit   0
 
#define reg_iop_sw_spu_rw_cpu_intr___intr1___lsb   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr1___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr1___bit   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr2___lsb   2
 
#define reg_iop_sw_spu_rw_cpu_intr___intr2___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr2___bit   2
 
#define reg_iop_sw_spu_rw_cpu_intr___intr3___lsb   3
 
#define reg_iop_sw_spu_rw_cpu_intr___intr3___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr3___bit   3
 
#define reg_iop_sw_spu_rw_cpu_intr___intr4___lsb   4
 
#define reg_iop_sw_spu_rw_cpu_intr___intr4___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr4___bit   4
 
#define reg_iop_sw_spu_rw_cpu_intr___intr5___lsb   5
 
#define reg_iop_sw_spu_rw_cpu_intr___intr5___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr5___bit   5
 
#define reg_iop_sw_spu_rw_cpu_intr___intr6___lsb   6
 
#define reg_iop_sw_spu_rw_cpu_intr___intr6___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr6___bit   6
 
#define reg_iop_sw_spu_rw_cpu_intr___intr7___lsb   7
 
#define reg_iop_sw_spu_rw_cpu_intr___intr7___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr7___bit   7
 
#define reg_iop_sw_spu_rw_cpu_intr___intr8___lsb   8
 
#define reg_iop_sw_spu_rw_cpu_intr___intr8___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr8___bit   8
 
#define reg_iop_sw_spu_rw_cpu_intr___intr9___lsb   9
 
#define reg_iop_sw_spu_rw_cpu_intr___intr9___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr9___bit   9
 
#define reg_iop_sw_spu_rw_cpu_intr___intr10___lsb   10
 
#define reg_iop_sw_spu_rw_cpu_intr___intr10___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr10___bit   10
 
#define reg_iop_sw_spu_rw_cpu_intr___intr11___lsb   11
 
#define reg_iop_sw_spu_rw_cpu_intr___intr11___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr11___bit   11
 
#define reg_iop_sw_spu_rw_cpu_intr___intr12___lsb   12
 
#define reg_iop_sw_spu_rw_cpu_intr___intr12___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr12___bit   12
 
#define reg_iop_sw_spu_rw_cpu_intr___intr13___lsb   13
 
#define reg_iop_sw_spu_rw_cpu_intr___intr13___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr13___bit   13
 
#define reg_iop_sw_spu_rw_cpu_intr___intr14___lsb   14
 
#define reg_iop_sw_spu_rw_cpu_intr___intr14___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr14___bit   14
 
#define reg_iop_sw_spu_rw_cpu_intr___intr15___lsb   15
 
#define reg_iop_sw_spu_rw_cpu_intr___intr15___width   1
 
#define reg_iop_sw_spu_rw_cpu_intr___intr15___bit   15
 
#define reg_iop_sw_spu_rw_cpu_intr_offset   148
 
#define reg_iop_sw_spu_r_cpu_intr___intr0___lsb   0
 
#define reg_iop_sw_spu_r_cpu_intr___intr0___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr0___bit   0
 
#define reg_iop_sw_spu_r_cpu_intr___intr1___lsb   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr1___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr1___bit   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr2___lsb   2
 
#define reg_iop_sw_spu_r_cpu_intr___intr2___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr2___bit   2
 
#define reg_iop_sw_spu_r_cpu_intr___intr3___lsb   3
 
#define reg_iop_sw_spu_r_cpu_intr___intr3___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr3___bit   3
 
#define reg_iop_sw_spu_r_cpu_intr___intr4___lsb   4
 
#define reg_iop_sw_spu_r_cpu_intr___intr4___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr4___bit   4
 
#define reg_iop_sw_spu_r_cpu_intr___intr5___lsb   5
 
#define reg_iop_sw_spu_r_cpu_intr___intr5___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr5___bit   5
 
#define reg_iop_sw_spu_r_cpu_intr___intr6___lsb   6
 
#define reg_iop_sw_spu_r_cpu_intr___intr6___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr6___bit   6
 
#define reg_iop_sw_spu_r_cpu_intr___intr7___lsb   7
 
#define reg_iop_sw_spu_r_cpu_intr___intr7___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr7___bit   7
 
#define reg_iop_sw_spu_r_cpu_intr___intr8___lsb   8
 
#define reg_iop_sw_spu_r_cpu_intr___intr8___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr8___bit   8
 
#define reg_iop_sw_spu_r_cpu_intr___intr9___lsb   9
 
#define reg_iop_sw_spu_r_cpu_intr___intr9___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr9___bit   9
 
#define reg_iop_sw_spu_r_cpu_intr___intr10___lsb   10
 
#define reg_iop_sw_spu_r_cpu_intr___intr10___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr10___bit   10
 
#define reg_iop_sw_spu_r_cpu_intr___intr11___lsb   11
 
#define reg_iop_sw_spu_r_cpu_intr___intr11___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr11___bit   11
 
#define reg_iop_sw_spu_r_cpu_intr___intr12___lsb   12
 
#define reg_iop_sw_spu_r_cpu_intr___intr12___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr12___bit   12
 
#define reg_iop_sw_spu_r_cpu_intr___intr13___lsb   13
 
#define reg_iop_sw_spu_r_cpu_intr___intr13___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr13___bit   13
 
#define reg_iop_sw_spu_r_cpu_intr___intr14___lsb   14
 
#define reg_iop_sw_spu_r_cpu_intr___intr14___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr14___bit   14
 
#define reg_iop_sw_spu_r_cpu_intr___intr15___lsb   15
 
#define reg_iop_sw_spu_r_cpu_intr___intr15___width   1
 
#define reg_iop_sw_spu_r_cpu_intr___intr15___bit   15
 
#define reg_iop_sw_spu_r_cpu_intr_offset   152
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___lsb   0
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___bit   0
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___lsb   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___bit   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___lsb   2
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___bit   2
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___lsb   3
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___bit   3
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___lsb   4
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___bit   4
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___lsb   5
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___bit   5
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___lsb   6
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___bit   6
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___lsb   7
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___width   1
 
#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___bit   7
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp0___lsb   8
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp0___width   1
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp0___bit   8
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp1___lsb   9
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp1___width   1
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp1___bit   9
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp2___lsb   10
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp2___width   1
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp2___bit   10
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp3___lsb   11
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp3___width   1
 
#define reg_iop_sw_spu_r_hw_intr___timer_grp3___bit   11
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out0___lsb   12
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out0___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out0___bit   12
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out0_extra___lsb   13
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out0_extra___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out0_extra___bit   13
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in0___lsb   14
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in0___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in0___bit   14
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in0_extra___lsb   15
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in0_extra___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in0_extra___bit   15
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out1___lsb   16
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out1___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out1___bit   16
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out1_extra___lsb   17
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out1_extra___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_out1_extra___bit   17
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in1___lsb   18
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in1___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in1___bit   18
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in1_extra___lsb   19
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in1_extra___width   1
 
#define reg_iop_sw_spu_r_hw_intr___fifo_in1_extra___bit   19
 
#define reg_iop_sw_spu_r_hw_intr___dmc_out0___lsb   20
 
#define reg_iop_sw_spu_r_hw_intr___dmc_out0___width   1
 
#define reg_iop_sw_spu_r_hw_intr___dmc_out0___bit   20
 
#define reg_iop_sw_spu_r_hw_intr___dmc_in0___lsb   21
 
#define reg_iop_sw_spu_r_hw_intr___dmc_in0___width   1
 
#define reg_iop_sw_spu_r_hw_intr___dmc_in0___bit   21
 
#define reg_iop_sw_spu_r_hw_intr___dmc_out1___lsb   22
 
#define reg_iop_sw_spu_r_hw_intr___dmc_out1___width   1
 
#define reg_iop_sw_spu_r_hw_intr___dmc_out1___bit   22
 
#define reg_iop_sw_spu_r_hw_intr___dmc_in1___lsb   23
 
#define reg_iop_sw_spu_r_hw_intr___dmc_in1___width   1
 
#define reg_iop_sw_spu_r_hw_intr___dmc_in1___bit   23
 
#define reg_iop_sw_spu_r_hw_intr_offset   156
 
#define reg_iop_sw_spu_rw_mpu_intr___intr0___lsb   0
 
#define reg_iop_sw_spu_rw_mpu_intr___intr0___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr0___bit   0
 
#define reg_iop_sw_spu_rw_mpu_intr___intr1___lsb   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr1___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr1___bit   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr2___lsb   2
 
#define reg_iop_sw_spu_rw_mpu_intr___intr2___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr2___bit   2
 
#define reg_iop_sw_spu_rw_mpu_intr___intr3___lsb   3
 
#define reg_iop_sw_spu_rw_mpu_intr___intr3___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr3___bit   3
 
#define reg_iop_sw_spu_rw_mpu_intr___intr4___lsb   4
 
#define reg_iop_sw_spu_rw_mpu_intr___intr4___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr4___bit   4
 
#define reg_iop_sw_spu_rw_mpu_intr___intr5___lsb   5
 
#define reg_iop_sw_spu_rw_mpu_intr___intr5___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr5___bit   5
 
#define reg_iop_sw_spu_rw_mpu_intr___intr6___lsb   6
 
#define reg_iop_sw_spu_rw_mpu_intr___intr6___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr6___bit   6
 
#define reg_iop_sw_spu_rw_mpu_intr___intr7___lsb   7
 
#define reg_iop_sw_spu_rw_mpu_intr___intr7___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr7___bit   7
 
#define reg_iop_sw_spu_rw_mpu_intr___intr8___lsb   8
 
#define reg_iop_sw_spu_rw_mpu_intr___intr8___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr8___bit   8
 
#define reg_iop_sw_spu_rw_mpu_intr___intr9___lsb   9
 
#define reg_iop_sw_spu_rw_mpu_intr___intr9___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr9___bit   9
 
#define reg_iop_sw_spu_rw_mpu_intr___intr10___lsb   10
 
#define reg_iop_sw_spu_rw_mpu_intr___intr10___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr10___bit   10
 
#define reg_iop_sw_spu_rw_mpu_intr___intr11___lsb   11
 
#define reg_iop_sw_spu_rw_mpu_intr___intr11___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr11___bit   11
 
#define reg_iop_sw_spu_rw_mpu_intr___intr12___lsb   12
 
#define reg_iop_sw_spu_rw_mpu_intr___intr12___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr12___bit   12
 
#define reg_iop_sw_spu_rw_mpu_intr___intr13___lsb   13
 
#define reg_iop_sw_spu_rw_mpu_intr___intr13___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr13___bit   13
 
#define reg_iop_sw_spu_rw_mpu_intr___intr14___lsb   14
 
#define reg_iop_sw_spu_rw_mpu_intr___intr14___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr14___bit   14
 
#define reg_iop_sw_spu_rw_mpu_intr___intr15___lsb   15
 
#define reg_iop_sw_spu_rw_mpu_intr___intr15___width   1
 
#define reg_iop_sw_spu_rw_mpu_intr___intr15___bit   15
 
#define reg_iop_sw_spu_rw_mpu_intr_offset   160
 
#define reg_iop_sw_spu_r_mpu_intr___intr0___lsb   0
 
#define reg_iop_sw_spu_r_mpu_intr___intr0___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr0___bit   0
 
#define reg_iop_sw_spu_r_mpu_intr___intr1___lsb   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr1___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr1___bit   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr2___lsb   2
 
#define reg_iop_sw_spu_r_mpu_intr___intr2___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr2___bit   2
 
#define reg_iop_sw_spu_r_mpu_intr___intr3___lsb   3
 
#define reg_iop_sw_spu_r_mpu_intr___intr3___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr3___bit   3
 
#define reg_iop_sw_spu_r_mpu_intr___intr4___lsb   4
 
#define reg_iop_sw_spu_r_mpu_intr___intr4___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr4___bit   4
 
#define reg_iop_sw_spu_r_mpu_intr___intr5___lsb   5
 
#define reg_iop_sw_spu_r_mpu_intr___intr5___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr5___bit   5
 
#define reg_iop_sw_spu_r_mpu_intr___intr6___lsb   6
 
#define reg_iop_sw_spu_r_mpu_intr___intr6___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr6___bit   6
 
#define reg_iop_sw_spu_r_mpu_intr___intr7___lsb   7
 
#define reg_iop_sw_spu_r_mpu_intr___intr7___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr7___bit   7
 
#define reg_iop_sw_spu_r_mpu_intr___intr8___lsb   8
 
#define reg_iop_sw_spu_r_mpu_intr___intr8___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr8___bit   8
 
#define reg_iop_sw_spu_r_mpu_intr___intr9___lsb   9
 
#define reg_iop_sw_spu_r_mpu_intr___intr9___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr9___bit   9
 
#define reg_iop_sw_spu_r_mpu_intr___intr10___lsb   10
 
#define reg_iop_sw_spu_r_mpu_intr___intr10___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr10___bit   10
 
#define reg_iop_sw_spu_r_mpu_intr___intr11___lsb   11
 
#define reg_iop_sw_spu_r_mpu_intr___intr11___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr11___bit   11
 
#define reg_iop_sw_spu_r_mpu_intr___intr12___lsb   12
 
#define reg_iop_sw_spu_r_mpu_intr___intr12___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr12___bit   12
 
#define reg_iop_sw_spu_r_mpu_intr___intr13___lsb   13
 
#define reg_iop_sw_spu_r_mpu_intr___intr13___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr13___bit   13
 
#define reg_iop_sw_spu_r_mpu_intr___intr14___lsb   14
 
#define reg_iop_sw_spu_r_mpu_intr___intr14___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr14___bit   14
 
#define reg_iop_sw_spu_r_mpu_intr___intr15___lsb   15
 
#define reg_iop_sw_spu_r_mpu_intr___intr15___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___intr15___bit   15
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr0___lsb   16
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr0___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr0___bit   16
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr1___lsb   17
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr1___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr1___bit   17
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr2___lsb   18
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr2___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr2___bit   18
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr3___lsb   19
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr3___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr3___bit   19
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr4___lsb   20
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr4___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr4___bit   20
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr5___lsb   21
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr5___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr5___bit   21
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr6___lsb   22
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr6___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr6___bit   22
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr7___lsb   23
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr7___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr7___bit   23
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr8___lsb   24
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr8___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr8___bit   24
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr9___lsb   25
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr9___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr9___bit   25
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr10___lsb   26
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr10___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr10___bit   26
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr11___lsb   27
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr11___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr11___bit   27
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr12___lsb   28
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr12___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr12___bit   28
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr13___lsb   29
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr13___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr13___bit   29
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr14___lsb   30
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr14___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr14___bit   30
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr15___lsb   31
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr15___width   1
 
#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr15___bit   31
 
#define reg_iop_sw_spu_r_mpu_intr_offset   164
 
#define regk_iop_sw_spu_copy   0x00000000
 
#define regk_iop_sw_spu_no   0x00000000
 
#define regk_iop_sw_spu_nop   0x00000000
 
#define regk_iop_sw_spu_rd   0x00000002
 
#define regk_iop_sw_spu_reg_copy   0x00000001
 
#define regk_iop_sw_spu_rw_bus0_clr_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_bus0_oe_clr_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_bus0_oe_set_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_bus0_set_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_bus1_clr_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_bus1_oe_clr_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_bus1_oe_set_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_bus1_set_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_gio_clr_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_gio_oe_clr_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_gio_oe_set_mask_default   0x00000000
 
#define regk_iop_sw_spu_rw_gio_set_mask_default   0x00000000
 
#define regk_iop_sw_spu_set   0x00000001
 
#define regk_iop_sw_spu_wr   0x00000003
 
#define regk_iop_sw_spu_yes   0x00000001
 

Macro Definition Documentation

#define REG_ADDR (   scope,
  inst,
  reg 
)    REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)

Definition at line 44 of file iop_sw_spu_defs_asm.h.

#define REG_ADDR_VECT (   scope,
  inst,
  reg,
  index 
)
Value:
REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
STRIDE_##scope##_##reg )

Definition at line 49 of file iop_sw_spu_defs_asm.h.

#define REG_ADDR_VECT_X_ (   inst,
  offs,
  index,
  stride 
)    ((inst) + offs + (index) * stride)

Definition at line 52 of file iop_sw_spu_defs_asm.h.

#define REG_ADDR_X_ (   inst,
  offs 
)    ((inst) + offs)

Definition at line 45 of file iop_sw_spu_defs_asm.h.

#define REG_BIT (   scope,
  reg,
  field 
)    reg_##scope##_##reg##___##field##___bit

Definition at line 40 of file iop_sw_spu_defs_asm.h.

#define REG_FIELD (   scope,
  reg,
  field,
  value 
)    REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )

Definition at line 18 of file iop_sw_spu_defs_asm.h.

#define REG_FIELD_X_ (   value,
  shift 
)    ((value) << shift)

Definition at line 20 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_bus0_in_offset   40

Definition at line 166 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_bus1_in_offset   60

Definition at line 221 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr0___bit   0

Definition at line 396 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr0___lsb   0

Definition at line 394 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr0___width   1

Definition at line 395 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr10___bit   10

Definition at line 426 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr10___lsb   10

Definition at line 424 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr10___width   1

Definition at line 425 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr11___bit   11

Definition at line 429 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr11___lsb   11

Definition at line 427 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr11___width   1

Definition at line 428 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr12___bit   12

Definition at line 432 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr12___lsb   12

Definition at line 430 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr12___width   1

Definition at line 431 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr13___bit   13

Definition at line 435 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr13___lsb   13

Definition at line 433 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr13___width   1

Definition at line 434 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr14___bit   14

Definition at line 438 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr14___lsb   14

Definition at line 436 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr14___width   1

Definition at line 437 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr15___bit   15

Definition at line 441 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr15___lsb   15

Definition at line 439 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr15___width   1

Definition at line 440 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr1___bit   1

Definition at line 399 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr1___lsb   1

Definition at line 397 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr1___width   1

Definition at line 398 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr2___bit   2

Definition at line 402 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr2___lsb   2

Definition at line 400 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr2___width   1

Definition at line 401 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr3___bit   3

Definition at line 405 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr3___lsb   3

Definition at line 403 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr3___width   1

Definition at line 404 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr4___bit   4

Definition at line 408 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr4___lsb   4

Definition at line 406 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr4___width   1

Definition at line 407 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr5___bit   5

Definition at line 411 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr5___lsb   5

Definition at line 409 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr5___width   1

Definition at line 410 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr6___bit   6

Definition at line 414 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr6___lsb   6

Definition at line 412 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr6___width   1

Definition at line 413 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr7___bit   7

Definition at line 417 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr7___lsb   7

Definition at line 415 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr7___width   1

Definition at line 416 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr8___bit   8

Definition at line 420 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr8___lsb   8

Definition at line 418 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr8___width   1

Definition at line 419 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr9___bit   9

Definition at line 423 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr9___lsb   9

Definition at line 421 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr9___width   1

Definition at line 422 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr_offset   152

Definition at line 442 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_gio_in_offset   80

Definition at line 244 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in0___bit   21

Definition at line 510 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in0___lsb   21

Definition at line 508 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in0___width   1

Definition at line 509 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in1___bit   23

Definition at line 516 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in1___lsb   23

Definition at line 514 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in1___width   1

Definition at line 515 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out0___bit   20

Definition at line 507 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out0___lsb   20

Definition at line 505 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out0___width   1

Definition at line 506 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out1___bit   22

Definition at line 513 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out1___lsb   22

Definition at line 511 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out1___width   1

Definition at line 512 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in0___bit   14

Definition at line 489 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in0___lsb   14

Definition at line 487 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in0___width   1

Definition at line 488 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in0_extra___bit   15

Definition at line 492 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in0_extra___lsb   15

Definition at line 490 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in0_extra___width   1

Definition at line 491 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in1___bit   18

Definition at line 501 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in1___lsb   18

Definition at line 499 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in1___width   1

Definition at line 500 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in1_extra___bit   19

Definition at line 504 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in1_extra___lsb   19

Definition at line 502 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in1_extra___width   1

Definition at line 503 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out0___bit   12

Definition at line 483 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out0___lsb   12

Definition at line 481 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out0___width   1

Definition at line 482 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out0_extra___bit   13

Definition at line 486 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out0_extra___lsb   13

Definition at line 484 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out0_extra___width   1

Definition at line 485 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out1___bit   16

Definition at line 495 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out1___lsb   16

Definition at line 493 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out1___width   1

Definition at line 494 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out1_extra___bit   17

Definition at line 498 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out1_extra___lsb   17

Definition at line 496 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out1_extra___width   1

Definition at line 497 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp0___bit   8

Definition at line 471 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp0___lsb   8

Definition at line 469 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp0___width   1

Definition at line 470 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp1___bit   9

Definition at line 474 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp1___lsb   9

Definition at line 472 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp1___width   1

Definition at line 473 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp2___bit   10

Definition at line 477 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp2___lsb   10

Definition at line 475 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp2___width   1

Definition at line 476 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp3___bit   11

Definition at line 480 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp3___lsb   11

Definition at line 478 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp3___width   1

Definition at line 479 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___bit   0

Definition at line 447 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___lsb   0

Definition at line 445 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___width   1

Definition at line 446 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___bit   1

Definition at line 450 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___lsb   1

Definition at line 448 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___width   1

Definition at line 449 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___bit   2

Definition at line 453 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___lsb   2

Definition at line 451 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___width   1

Definition at line 452 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___bit   3

Definition at line 456 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___lsb   3

Definition at line 454 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___width   1

Definition at line 455 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___bit   4

Definition at line 459 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___lsb   4

Definition at line 457 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___width   1

Definition at line 458 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___bit   5

Definition at line 462 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___lsb   5

Definition at line 460 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___width   1

Definition at line 461 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___bit   6

Definition at line 465 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___lsb   6

Definition at line 463 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___width   1

Definition at line 464 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___bit   7

Definition at line 468 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___lsb   7

Definition at line 466 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___width   1

Definition at line 467 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr_offset   156

Definition at line 517 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_data_offset   16

Definition at line 84 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_cpu___bit   0

Definition at line 89 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_cpu___lsb   0

Definition at line 87 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_cpu___width   1

Definition at line 88 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_mpu___bit   1

Definition at line 92 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_mpu___lsb   1

Definition at line 90 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_mpu___width   1

Definition at line 91 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu0___bit   2

Definition at line 95 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu0___lsb   2

Definition at line 93 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu0___width   1

Definition at line 94 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu1___bit   3

Definition at line 98 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu1___lsb   3

Definition at line 96 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu1___width   1

Definition at line 97 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___bit   4

Definition at line 101 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___lsb   4

Definition at line 99 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___width   1

Definition at line 100 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___bit   5

Definition at line 104 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___lsb   5

Definition at line 102 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___width   1

Definition at line 103 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu0___bit   6

Definition at line 107 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu0___lsb   6

Definition at line 105 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu0___width   1

Definition at line 106 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu1___bit   7

Definition at line 110 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu1___lsb   7

Definition at line 108 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu1___width   1

Definition at line 109 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat_offset   20

Definition at line 111 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr0___bit   0

Definition at line 573 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr0___lsb   0

Definition at line 571 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr0___width   1

Definition at line 572 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr10___bit   10

Definition at line 603 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr10___lsb   10

Definition at line 601 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr10___width   1

Definition at line 602 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr11___bit   11

Definition at line 606 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr11___lsb   11

Definition at line 604 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr11___width   1

Definition at line 605 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr12___bit   12

Definition at line 609 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr12___lsb   12

Definition at line 607 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr12___width   1

Definition at line 608 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr13___bit   13

Definition at line 612 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr13___lsb   13

Definition at line 610 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr13___width   1

Definition at line 611 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr14___bit   14

Definition at line 615 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr14___lsb   14

Definition at line 613 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr14___width   1

Definition at line 614 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr15___bit   15

Definition at line 618 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr15___lsb   15

Definition at line 616 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr15___width   1

Definition at line 617 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr1___bit   1

Definition at line 576 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr1___lsb   1

Definition at line 574 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr1___width   1

Definition at line 575 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr2___bit   2

Definition at line 579 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr2___lsb   2

Definition at line 577 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr2___width   1

Definition at line 578 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr3___bit   3

Definition at line 582 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr3___lsb   3

Definition at line 580 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr3___width   1

Definition at line 581 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr4___bit   4

Definition at line 585 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr4___lsb   4

Definition at line 583 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr4___width   1

Definition at line 584 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr5___bit   5

Definition at line 588 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr5___lsb   5

Definition at line 586 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr5___width   1

Definition at line 587 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr6___bit   6

Definition at line 591 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr6___lsb   6

Definition at line 589 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr6___width   1

Definition at line 590 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr7___bit   7

Definition at line 594 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr7___lsb   7

Definition at line 592 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr7___width   1

Definition at line 593 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr8___bit   8

Definition at line 597 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr8___lsb   8

Definition at line 595 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr8___width   1

Definition at line 596 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr9___bit   9

Definition at line 600 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr9___lsb   9

Definition at line 598 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr9___width   1

Definition at line 599 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr0___bit   16

Definition at line 621 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr0___lsb   16

Definition at line 619 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr0___width   1

Definition at line 620 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr10___bit   26

Definition at line 651 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr10___lsb   26

Definition at line 649 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr10___width   1

Definition at line 650 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr11___bit   27

Definition at line 654 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr11___lsb   27

Definition at line 652 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr11___width   1

Definition at line 653 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr12___bit   28

Definition at line 657 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr12___lsb   28

Definition at line 655 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr12___width   1

Definition at line 656 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr13___bit   29

Definition at line 660 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr13___lsb   29

Definition at line 658 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr13___width   1

Definition at line 659 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr14___bit   30

Definition at line 663 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr14___lsb   30

Definition at line 661 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr14___width   1

Definition at line 662 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr15___bit   31

Definition at line 666 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr15___lsb   31

Definition at line 664 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr15___width   1

Definition at line 665 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr1___bit   17

Definition at line 624 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr1___lsb   17

Definition at line 622 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr1___width   1

Definition at line 623 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr2___bit   18

Definition at line 627 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr2___lsb   18

Definition at line 625 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr2___width   1

Definition at line 626 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr3___bit   19

Definition at line 630 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr3___lsb   19

Definition at line 628 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr3___width   1

Definition at line 629 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr4___bit   20

Definition at line 633 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr4___lsb   20

Definition at line 631 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr4___width   1

Definition at line 632 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr5___bit   21

Definition at line 636 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr5___lsb   21

Definition at line 634 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr5___width   1

Definition at line 635 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr6___bit   22

Definition at line 639 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr6___lsb   22

Definition at line 637 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr6___width   1

Definition at line 638 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr7___bit   23

Definition at line 642 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr7___lsb   23

Definition at line 640 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr7___width   1

Definition at line 641 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr8___bit   24

Definition at line 645 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr8___lsb   24

Definition at line 643 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr8___width   1

Definition at line 644 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr9___bit   25

Definition at line 648 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr9___lsb   25

Definition at line 646 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___other_spu_intr9___width   1

Definition at line 647 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr_offset   164

Definition at line 667 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rs_mc_data_offset   12

Definition at line 81 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte0___lsb   0

Definition at line 114 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte0___width   8

Definition at line 115 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte1___lsb   8

Definition at line 116 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte1___width   8

Definition at line 117 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte2___lsb   16

Definition at line 118 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte2___width   8

Definition at line 119 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte3___lsb   24

Definition at line 120 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask___byte3___width   8

Definition at line 121 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte2___lsb   0

Definition at line 254 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte2___width   8

Definition at line 255 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte3___lsb   8

Definition at line 256 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_hi___byte3___width   8

Definition at line 257 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_hi_offset   88

Definition at line 258 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte0___lsb   0

Definition at line 247 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte0___width   8

Definition at line 248 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte1___lsb   8

Definition at line 249 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_lo___byte1___width   8

Definition at line 250 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_lo_offset   84

Definition at line 251 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_clr_mask_offset   24

Definition at line 122 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte0___bit   0

Definition at line 138 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte0___lsb   0

Definition at line 136 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte0___width   1

Definition at line 137 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte1___bit   1

Definition at line 141 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte1___lsb   1

Definition at line 139 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte1___width   1

Definition at line 140 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte2___bit   2

Definition at line 144 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte2___lsb   2

Definition at line 142 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte2___width   1

Definition at line 143 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte3___bit   3

Definition at line 147 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte3___lsb   3

Definition at line 145 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask___byte3___width   1

Definition at line 146 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_clr_mask_offset   32

Definition at line 148 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte0___bit   0

Definition at line 153 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte0___lsb   0

Definition at line 151 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte0___width   1

Definition at line 152 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte1___bit   1

Definition at line 156 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte1___lsb   1

Definition at line 154 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte1___width   1

Definition at line 155 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte2___bit   2

Definition at line 159 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte2___lsb   2

Definition at line 157 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte2___width   1

Definition at line 158 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte3___bit   3

Definition at line 162 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte3___lsb   3

Definition at line 160 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask___byte3___width   1

Definition at line 161 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_oe_set_mask_offset   36

Definition at line 163 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte0___lsb   0

Definition at line 125 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte0___width   8

Definition at line 126 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte1___lsb   8

Definition at line 127 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte1___width   8

Definition at line 128 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte2___lsb   16

Definition at line 129 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte2___width   8

Definition at line 130 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte3___lsb   24

Definition at line 131 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask___byte3___width   8

Definition at line 132 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte2___lsb   0

Definition at line 268 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte2___width   8

Definition at line 269 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte3___lsb   8

Definition at line 270 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_hi___byte3___width   8

Definition at line 271 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_hi_offset   96

Definition at line 272 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte0___lsb   0

Definition at line 261 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte0___width   8

Definition at line 262 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte1___lsb   8

Definition at line 263 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_lo___byte1___width   8

Definition at line 264 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_lo_offset   92

Definition at line 265 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus0_set_mask_offset   28

Definition at line 133 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte0___lsb   0

Definition at line 169 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte0___width   8

Definition at line 170 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte1___lsb   8

Definition at line 171 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte1___width   8

Definition at line 172 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte2___lsb   16

Definition at line 173 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte2___width   8

Definition at line 174 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte3___lsb   24

Definition at line 175 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask___byte3___width   8

Definition at line 176 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte2___lsb   0

Definition at line 282 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte2___width   8

Definition at line 283 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte3___lsb   8

Definition at line 284 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_hi___byte3___width   8

Definition at line 285 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_hi_offset   104

Definition at line 286 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte0___lsb   0

Definition at line 275 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte0___width   8

Definition at line 276 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte1___lsb   8

Definition at line 277 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_lo___byte1___width   8

Definition at line 278 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_lo_offset   100

Definition at line 279 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_clr_mask_offset   44

Definition at line 177 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte0___bit   0

Definition at line 193 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte0___lsb   0

Definition at line 191 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte0___width   1

Definition at line 192 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte1___bit   1

Definition at line 196 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte1___lsb   1

Definition at line 194 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte1___width   1

Definition at line 195 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte2___bit   2

Definition at line 199 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte2___lsb   2

Definition at line 197 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte2___width   1

Definition at line 198 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte3___bit   3

Definition at line 202 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte3___lsb   3

Definition at line 200 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask___byte3___width   1

Definition at line 201 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_clr_mask_offset   52

Definition at line 203 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte0___bit   0

Definition at line 208 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte0___lsb   0

Definition at line 206 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte0___width   1

Definition at line 207 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte1___bit   1

Definition at line 211 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte1___lsb   1

Definition at line 209 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte1___width   1

Definition at line 210 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte2___bit   2

Definition at line 214 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte2___lsb   2

Definition at line 212 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte2___width   1

Definition at line 213 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte3___bit   3

Definition at line 217 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte3___lsb   3

Definition at line 215 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask___byte3___width   1

Definition at line 216 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_oe_set_mask_offset   56

Definition at line 218 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte0___lsb   0

Definition at line 180 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte0___width   8

Definition at line 181 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte1___lsb   8

Definition at line 182 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte1___width   8

Definition at line 183 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte2___lsb   16

Definition at line 184 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte2___width   8

Definition at line 185 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte3___lsb   24

Definition at line 186 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask___byte3___width   8

Definition at line 187 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte2___lsb   0

Definition at line 296 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte2___width   8

Definition at line 297 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte3___lsb   8

Definition at line 298 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_hi___byte3___width   8

Definition at line 299 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_hi_offset   112

Definition at line 300 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte0___lsb   0

Definition at line 289 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte0___width   8

Definition at line 290 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte1___lsb   8

Definition at line 291 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_lo___byte1___width   8

Definition at line 292 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_lo_offset   108

Definition at line 293 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus1_set_mask_offset   48

Definition at line 188 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr0___bit   0

Definition at line 345 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr0___lsb   0

Definition at line 343 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr0___width   1

Definition at line 344 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr10___bit   10

Definition at line 375 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr10___lsb   10

Definition at line 373 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr10___width   1

Definition at line 374 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr11___bit   11

Definition at line 378 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr11___lsb   11

Definition at line 376 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr11___width   1

Definition at line 377 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr12___bit   12

Definition at line 381 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr12___lsb   12

Definition at line 379 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr12___width   1

Definition at line 380 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr13___bit   13

Definition at line 384 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr13___lsb   13

Definition at line 382 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr13___width   1

Definition at line 383 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr14___bit   14

Definition at line 387 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr14___lsb   14

Definition at line 385 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr14___width   1

Definition at line 386 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr15___bit   15

Definition at line 390 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr15___lsb   15

Definition at line 388 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr15___width   1

Definition at line 389 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr1___bit   1

Definition at line 348 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr1___lsb   1

Definition at line 346 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr1___width   1

Definition at line 347 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr2___bit   2

Definition at line 351 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr2___lsb   2

Definition at line 349 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr2___width   1

Definition at line 350 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr3___bit   3

Definition at line 354 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr3___lsb   3

Definition at line 352 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr3___width   1

Definition at line 353 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr4___bit   4

Definition at line 357 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr4___lsb   4

Definition at line 355 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr4___width   1

Definition at line 356 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr5___bit   5

Definition at line 360 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr5___lsb   5

Definition at line 358 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr5___width   1

Definition at line 359 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr6___bit   6

Definition at line 363 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr6___lsb   6

Definition at line 361 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr6___width   1

Definition at line 362 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr7___bit   7

Definition at line 366 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr7___lsb   7

Definition at line 364 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr7___width   1

Definition at line 365 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr8___bit   8

Definition at line 369 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr8___lsb   8

Definition at line 367 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr8___width   1

Definition at line 368 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr9___bit   9

Definition at line 372 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr9___lsb   9

Definition at line 370 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr9___width   1

Definition at line 371 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr_offset   148

Definition at line 391 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask___val___lsb   0

Definition at line 224 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask___val___width   32

Definition at line 225 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___lsb   0

Definition at line 308 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___width   16

Definition at line 309 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_hi_offset   120

Definition at line 310 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___lsb   0

Definition at line 303 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___width   16

Definition at line 304 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_lo_offset   116

Definition at line 305 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_offset   64

Definition at line 226 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb   0

Definition at line 234 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___width   32

Definition at line 235 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___lsb   0

Definition at line 328 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___width   16

Definition at line 329 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi_offset   136

Definition at line 330 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___lsb   0

Definition at line 323 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___width   16

Definition at line 324 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo_offset   132

Definition at line 325 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_offset   72

Definition at line 236 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___lsb   0

Definition at line 239 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___width   32

Definition at line 240 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___lsb   0

Definition at line 338 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___width   16

Definition at line 339 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset   144

Definition at line 340 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___lsb   0

Definition at line 333 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___width   16

Definition at line 334 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo_offset   140

Definition at line 335 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_offset   76

Definition at line 241 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask___val___lsb   0

Definition at line 229 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask___val___width   32

Definition at line 230 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___lsb   0

Definition at line 318 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___width   16

Definition at line 319 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_hi_offset   128

Definition at line 320 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___lsb   0

Definition at line 313 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___width   16

Definition at line 314 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_lo_offset   124

Definition at line 315 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_offset   68

Definition at line 231 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_addr_offset   8

Definition at line 78 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___cmd___lsb   1

Definition at line 60 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___cmd___width   2

Definition at line 61 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___bit   0

Definition at line 59 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___lsb   0

Definition at line 57 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___width   1

Definition at line 58 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___size___lsb   3

Definition at line 62 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___size___width   3

Definition at line 63 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu0_mem___bit   6

Definition at line 66 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu0_mem___lsb   6

Definition at line 64 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu0_mem___width   1

Definition at line 65 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu1_mem___bit   7

Definition at line 69 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu1_mem___lsb   7

Definition at line 67 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu1_mem___width   1

Definition at line 68 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl_offset   0

Definition at line 70 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_data___val___lsb   0

Definition at line 73 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_data___val___width   32

Definition at line 74 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_data_offset   4

Definition at line 75 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr0___bit   0

Definition at line 522 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr0___lsb   0

Definition at line 520 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr0___width   1

Definition at line 521 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr10___bit   10

Definition at line 552 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr10___lsb   10

Definition at line 550 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr10___width   1

Definition at line 551 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr11___bit   11

Definition at line 555 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr11___lsb   11

Definition at line 553 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr11___width   1

Definition at line 554 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr12___bit   12

Definition at line 558 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr12___lsb   12

Definition at line 556 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr12___width   1

Definition at line 557 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr13___bit   13

Definition at line 561 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr13___lsb   13

Definition at line 559 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr13___width   1

Definition at line 560 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr14___bit   14

Definition at line 564 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr14___lsb   14

Definition at line 562 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr14___width   1

Definition at line 563 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr15___bit   15

Definition at line 567 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr15___lsb   15

Definition at line 565 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr15___width   1

Definition at line 566 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr1___bit   1

Definition at line 525 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr1___lsb   1

Definition at line 523 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr1___width   1

Definition at line 524 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr2___bit   2

Definition at line 528 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr2___lsb   2

Definition at line 526 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr2___width   1

Definition at line 527 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr3___bit   3

Definition at line 531 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr3___lsb   3

Definition at line 529 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr3___width   1

Definition at line 530 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr4___bit   4

Definition at line 534 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr4___lsb   4

Definition at line 532 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr4___width   1

Definition at line 533 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr5___bit   5

Definition at line 537 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr5___lsb   5

Definition at line 535 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr5___width   1

Definition at line 536 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr6___bit   6

Definition at line 540 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr6___lsb   6

Definition at line 538 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr6___width   1

Definition at line 539 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr7___bit   7

Definition at line 543 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr7___lsb   7

Definition at line 541 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr7___width   1

Definition at line 542 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr8___bit   8

Definition at line 546 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr8___lsb   8

Definition at line 544 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr8___width   1

Definition at line 545 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr9___bit   9

Definition at line 549 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr9___lsb   9

Definition at line 547 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr9___width   1

Definition at line 548 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr_offset   160

Definition at line 568 of file iop_sw_spu_defs_asm.h.

#define REG_LSB (   scope,
  reg,
  field 
)    reg_##scope##_##reg##___##field##___lsb

Definition at line 36 of file iop_sw_spu_defs_asm.h.

#define REG_MASK (   scope,
  reg,
  field 
)    REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )

Definition at line 30 of file iop_sw_spu_defs_asm.h.

#define REG_MASK_X_ (   width,
  lsb 
)    (((1 << width)-1) << lsb)

Definition at line 32 of file iop_sw_spu_defs_asm.h.

#define REG_STATE (   scope,
  reg,
  field,
  symbolic_value 
)    REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )

Definition at line 24 of file iop_sw_spu_defs_asm.h.

#define REG_STATE_X_ (   k,
  shift 
)    (k << shift)

Definition at line 26 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_copy   0x00000000

Definition at line 671 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_no   0x00000000

Definition at line 672 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_nop   0x00000000

Definition at line 673 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rd   0x00000002

Definition at line 674 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_reg_copy   0x00000001

Definition at line 675 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus0_clr_mask_default   0x00000000

Definition at line 676 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus0_oe_clr_mask_default   0x00000000

Definition at line 677 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus0_oe_set_mask_default   0x00000000

Definition at line 678 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus0_set_mask_default   0x00000000

Definition at line 679 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus1_clr_mask_default   0x00000000

Definition at line 680 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus1_oe_clr_mask_default   0x00000000

Definition at line 681 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus1_oe_set_mask_default   0x00000000

Definition at line 682 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus1_set_mask_default   0x00000000

Definition at line 683 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_clr_mask_default   0x00000000

Definition at line 684 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_oe_clr_mask_default   0x00000000

Definition at line 685 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_oe_set_mask_default   0x00000000

Definition at line 686 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_set_mask_default   0x00000000

Definition at line 687 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_set   0x00000001

Definition at line 688 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_wr   0x00000003

Definition at line 689 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_yes   0x00000001

Definition at line 690 of file iop_sw_spu_defs_asm.h.

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