#include <linux/spinlock.h>
#include <asm/io.h>

Macros
#define	dma_outb outb

#define	dma_inb inb

#define	MAX_DMA_CHANNELS 8

#define	MAX_DMA_PFN ((16 * 1024 * 1024) >> PAGE_SHIFT)

#define	MAX_DMA32_PFN ((4UL * 1024 * 1024 * 1024) >> PAGE_SHIFT)

#define	MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT))

#define	IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */

#define	IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */

#define	DMA1_CMD_REG 0x08 /* command register (w) */

#define	DMA1_STAT_REG 0x08 /* status register (r) */

#define	DMA1_REQ_REG 0x09 /* request register (w) */

#define	DMA1_MASK_REG 0x0A /* single-channel mask (w) */

#define	DMA1_MODE_REG 0x0B /* mode register (w) */

#define	DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */

#define	DMA1_TEMP_REG 0x0D /* Temporary Register (r) */

#define	DMA1_RESET_REG 0x0D /* Master Clear (w) */

#define	DMA1_CLR_MASK_REG 0x0E /* Clear Mask */

#define	DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */

#define	DMA2_CMD_REG 0xD0 /* command register (w) */

#define	DMA2_STAT_REG 0xD0 /* status register (r) */

#define	DMA2_REQ_REG 0xD2 /* request register (w) */

#define	DMA2_MASK_REG 0xD4 /* single-channel mask (w) */

#define	DMA2_MODE_REG 0xD6 /* mode register (w) */

#define	DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */

#define	DMA2_TEMP_REG 0xDA /* Temporary Register (r) */

#define	DMA2_RESET_REG 0xDA /* Master Clear (w) */

#define	DMA2_CLR_MASK_REG 0xDC /* Clear Mask */

#define	DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */

#define	DMA_ADDR_0 0x00 /* DMA address registers */

#define	DMA_ADDR_1 0x02

#define	DMA_ADDR_2 0x04

#define	DMA_ADDR_3 0x06

#define	DMA_ADDR_4 0xC0

#define	DMA_ADDR_5 0xC4

#define	DMA_ADDR_6 0xC8

#define	DMA_ADDR_7 0xCC

#define	DMA_CNT_0 0x01 /* DMA count registers */

#define	DMA_CNT_1 0x03

#define	DMA_CNT_2 0x05

#define	DMA_CNT_3 0x07

#define	DMA_CNT_4 0xC2

#define	DMA_CNT_5 0xC6

#define	DMA_CNT_6 0xCA

#define	DMA_CNT_7 0xCE

#define	DMA_PAGE_0 0x87 /* DMA page registers */

#define	DMA_PAGE_1 0x83

#define	DMA_PAGE_2 0x81

#define	DMA_PAGE_3 0x82

#define	DMA_PAGE_5 0x8B

#define	DMA_PAGE_6 0x89

#define	DMA_PAGE_7 0x8A

#define	DMA_MODE_READ 0x44

#define	DMA_MODE_WRITE 0x48

#define	DMA_MODE_CASCADE 0xC0

#define	DMA_AUTOINIT 0x10

#define	isa_dma_bridge_buggy (0)

Macro Definition Documentation

#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */

Definition at line 96 of file dma.h.

#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */

Definition at line 99 of file dma.h.

#define DMA1_CMD_REG 0x08 /* command register (w) */

Definition at line 91 of file dma.h.

#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */

Definition at line 100 of file dma.h.

#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */

Definition at line 94 of file dma.h.

#define DMA1_MODE_REG 0x0B /* mode register (w) */

Definition at line 95 of file dma.h.

#define DMA1_REQ_REG 0x09 /* request register (w) */

Definition at line 93 of file dma.h.

#define DMA1_RESET_REG 0x0D /* Master Clear (w) */

Definition at line 98 of file dma.h.

#define DMA1_STAT_REG 0x08 /* status register (r) */

Definition at line 92 of file dma.h.

#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */

Definition at line 97 of file dma.h.

#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */

Definition at line 107 of file dma.h.

#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */

Definition at line 110 of file dma.h.

#define DMA2_CMD_REG 0xD0 /* command register (w) */

Definition at line 102 of file dma.h.

#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */

Definition at line 111 of file dma.h.

#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */

Definition at line 105 of file dma.h.

#define DMA2_MODE_REG 0xD6 /* mode register (w) */

Definition at line 106 of file dma.h.

#define DMA2_REQ_REG 0xD2 /* request register (w) */

Definition at line 104 of file dma.h.

#define DMA2_RESET_REG 0xDA /* Master Clear (w) */

Definition at line 109 of file dma.h.

#define DMA2_STAT_REG 0xD0 /* status register (r) */

Definition at line 103 of file dma.h.

#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */

Definition at line 108 of file dma.h.

#define DMA_ADDR_0 0x00 /* DMA address registers */

Definition at line 113 of file dma.h.

#define DMA_ADDR_1 0x02

Definition at line 114 of file dma.h.

#define DMA_ADDR_2 0x04

Definition at line 115 of file dma.h.

#define DMA_ADDR_3 0x06

Definition at line 116 of file dma.h.

#define DMA_ADDR_4 0xC0

Definition at line 117 of file dma.h.

#define DMA_ADDR_5 0xC4

Definition at line 118 of file dma.h.

#define DMA_ADDR_6 0xC8

Definition at line 119 of file dma.h.

#define DMA_ADDR_7 0xCC

Definition at line 120 of file dma.h.

#define DMA_AUTOINIT 0x10

Definition at line 146 of file dma.h.

#define DMA_CNT_0 0x01 /* DMA count registers */

Definition at line 122 of file dma.h.

#define DMA_CNT_1 0x03

Definition at line 123 of file dma.h.

#define DMA_CNT_2 0x05

Definition at line 124 of file dma.h.

#define DMA_CNT_3 0x07

Definition at line 125 of file dma.h.

#define DMA_CNT_4 0xC2

Definition at line 126 of file dma.h.

#define DMA_CNT_5 0xC6

Definition at line 127 of file dma.h.

#define DMA_CNT_6 0xCA

Definition at line 128 of file dma.h.

#define DMA_CNT_7 0xCE

Definition at line 129 of file dma.h.

#define dma_inb inb

Definition at line 20 of file dma.h.

#define DMA_MODE_CASCADE 0xC0

Definition at line 144 of file dma.h.

#define DMA_MODE_READ 0x44

Definition at line 140 of file dma.h.

#define DMA_MODE_WRITE 0x48

Definition at line 142 of file dma.h.

#define dma_outb outb

Definition at line 17 of file dma.h.

#define DMA_PAGE_0 0x87 /* DMA page registers */

Definition at line 131 of file dma.h.

#define DMA_PAGE_1 0x83

Definition at line 132 of file dma.h.

#define DMA_PAGE_2 0x81

Definition at line 133 of file dma.h.

#define DMA_PAGE_3 0x82

Definition at line 134 of file dma.h.

#define DMA_PAGE_5 0x8B

Definition at line 135 of file dma.h.

#define DMA_PAGE_6 0x89

Definition at line 136 of file dma.h.

#define DMA_PAGE_7 0x8A

Definition at line 137 of file dma.h.

#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */

Definition at line 87 of file dma.h.

#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */

Definition at line 88 of file dma.h.

#define isa_dma_bridge_buggy (0)

Definition at line 314 of file dma.h.

#define MAX_DMA32_PFN ((4UL * 1024 * 1024 * 1024) >> PAGE_SHIFT)

Definition at line 76 of file dma.h.

#define MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT))

Definition at line 83 of file dma.h.

#define MAX_DMA_CHANNELS 8

Definition at line 70 of file dma.h.

#define MAX_DMA_PFN ((16 * 1024 * 1024) >> PAGE_SHIFT)

Definition at line 73 of file dma.h.

Macros

Macro Definition Documentation