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regs-gpio.h
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1 /*
2  * arch/arm/mach-ks8695/include/mach/regs-gpio.h
3  *
4  * Copyright (C) 2007 Andrew Victor
5  *
6  * KS8695 - GPIO control registers and bit definitions.
7  *
8  * This file is licensed under the terms of the GNU General Public
9  * License version 2. This program is licensed "as is" without any
10  * warranty of any kind, whether express or implied.
11  */
12 
13 #ifndef KS8695_GPIO_H
14 #define KS8695_GPIO_H
15 
16 #define KS8695_GPIO_OFFSET (0xF0000 + 0xE600)
17 #define KS8695_GPIO_VA (KS8695_IO_VA + KS8695_GPIO_OFFSET)
18 #define KS8695_GPIO_PA (KS8695_IO_PA + KS8695_GPIO_OFFSET)
19 
20 
21 #define KS8695_IOPM (0x00) /* I/O Port Mode Register */
22 #define KS8695_IOPC (0x04) /* I/O Port Control Register */
23 #define KS8695_IOPD (0x08) /* I/O Port Data Register */
24 
25 
26 /* Port Mode Register */
27 #define IOPM(x) (1 << (x)) /* Mode for GPIO Pin x */
28 
29 /* Port Control Register */
30 #define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */
31 #define IOPC_IOTIM0EN (1 << 16) /* GPIO Pin for Timer0 Enable */
32 #define IOPC_IOEINT3EN (1 << 15) /* GPIO Pin for External/Soft Interrupt 3 Enable */
33 #define IOPC_IOEINT3TM (7 << 12) /* GPIO Pin for External/Soft Interrupt 3 Trigger Mode */
34 #define IOPC_IOEINT3_MODE(x) ((x) << 12)
35 #define IOPC_IOEINT2EN (1 << 11) /* GPIO Pin for External/Soft Interrupt 2 Enable */
36 #define IOPC_IOEINT2TM (7 << 8) /* GPIO Pin for External/Soft Interrupt 2 Trigger Mode */
37 #define IOPC_IOEINT2_MODE(x) ((x) << 8)
38 #define IOPC_IOEINT1EN (1 << 7) /* GPIO Pin for External/Soft Interrupt 1 Enable */
39 #define IOPC_IOEINT1TM (7 << 4) /* GPIO Pin for External/Soft Interrupt 1 Trigger Mode */
40 #define IOPC_IOEINT1_MODE(x) ((x) << 4)
41 #define IOPC_IOEINT0EN (1 << 3) /* GPIO Pin for External/Soft Interrupt 0 Enable */
42 #define IOPC_IOEINT0TM (7 << 0) /* GPIO Pin for External/Soft Interrupt 0 Trigger Mode */
43 #define IOPC_IOEINT0_MODE(x) ((x) << 0)
44 
45  /* Trigger Modes */
46 #define IOPC_TM_LOW (0) /* Level Detection (Active Low) */
47 #define IOPC_TM_HIGH (1) /* Level Detection (Active High) */
48 #define IOPC_TM_RISING (2) /* Rising Edge Detection */
49 #define IOPC_TM_FALLING (4) /* Falling Edge Detection */
50 #define IOPC_TM_EDGE (6) /* Both Edge Detection */
51 
52 /* Port Data Register */
53 #define IOPD(x) (1 << (x)) /* Signal Level of GPIO Pin x */
54 
55 #endif