Linux Kernel
3.7.1
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Macros | |
#define | KS8695_GPIO_OFFSET (0xF0000 + 0xE600) |
#define | KS8695_GPIO_VA (KS8695_IO_VA + KS8695_GPIO_OFFSET) |
#define | KS8695_GPIO_PA (KS8695_IO_PA + KS8695_GPIO_OFFSET) |
#define | KS8695_IOPM (0x00) /* I/O Port Mode Register */ |
#define | KS8695_IOPC (0x04) /* I/O Port Control Register */ |
#define | KS8695_IOPD (0x08) /* I/O Port Data Register */ |
#define | IOPM(x) (1 << (x)) /* Mode for GPIO Pin x */ |
#define | IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */ |
#define | IOPC_IOTIM0EN (1 << 16) /* GPIO Pin for Timer0 Enable */ |
#define | IOPC_IOEINT3EN (1 << 15) /* GPIO Pin for External/Soft Interrupt 3 Enable */ |
#define | IOPC_IOEINT3TM (7 << 12) /* GPIO Pin for External/Soft Interrupt 3 Trigger Mode */ |
#define | IOPC_IOEINT3_MODE(x) ((x) << 12) |
#define | IOPC_IOEINT2EN (1 << 11) /* GPIO Pin for External/Soft Interrupt 2 Enable */ |
#define | IOPC_IOEINT2TM (7 << 8) /* GPIO Pin for External/Soft Interrupt 2 Trigger Mode */ |
#define | IOPC_IOEINT2_MODE(x) ((x) << 8) |
#define | IOPC_IOEINT1EN (1 << 7) /* GPIO Pin for External/Soft Interrupt 1 Enable */ |
#define | IOPC_IOEINT1TM (7 << 4) /* GPIO Pin for External/Soft Interrupt 1 Trigger Mode */ |
#define | IOPC_IOEINT1_MODE(x) ((x) << 4) |
#define | IOPC_IOEINT0EN (1 << 3) /* GPIO Pin for External/Soft Interrupt 0 Enable */ |
#define | IOPC_IOEINT0TM (7 << 0) /* GPIO Pin for External/Soft Interrupt 0 Trigger Mode */ |
#define | IOPC_IOEINT0_MODE(x) ((x) << 0) |
#define | IOPC_TM_LOW (0) /* Level Detection (Active Low) */ |
#define | IOPC_TM_HIGH (1) /* Level Detection (Active High) */ |
#define | IOPC_TM_RISING (2) /* Rising Edge Detection */ |
#define | IOPC_TM_FALLING (4) /* Falling Edge Detection */ |
#define | IOPC_TM_EDGE (6) /* Both Edge Detection */ |
#define | IOPD(x) (1 << (x)) /* Signal Level of GPIO Pin x */ |
Definition at line 43 of file regs-gpio.h.
Definition at line 41 of file regs-gpio.h.
Definition at line 42 of file regs-gpio.h.
Definition at line 40 of file regs-gpio.h.
Definition at line 38 of file regs-gpio.h.
Definition at line 39 of file regs-gpio.h.
Definition at line 37 of file regs-gpio.h.
Definition at line 35 of file regs-gpio.h.
Definition at line 36 of file regs-gpio.h.
Definition at line 34 of file regs-gpio.h.
Definition at line 32 of file regs-gpio.h.
Definition at line 33 of file regs-gpio.h.
Definition at line 31 of file regs-gpio.h.
Definition at line 30 of file regs-gpio.h.
#define IOPC_TM_EDGE (6) /* Both Edge Detection */ |
Definition at line 50 of file regs-gpio.h.
#define IOPC_TM_FALLING (4) /* Falling Edge Detection */ |
Definition at line 49 of file regs-gpio.h.
#define IOPC_TM_HIGH (1) /* Level Detection (Active High) */ |
Definition at line 47 of file regs-gpio.h.
#define IOPC_TM_LOW (0) /* Level Detection (Active Low) */ |
Definition at line 46 of file regs-gpio.h.
#define IOPC_TM_RISING (2) /* Rising Edge Detection */ |
Definition at line 48 of file regs-gpio.h.
Definition at line 53 of file regs-gpio.h.
#define KS8695_GPIO_OFFSET (0xF0000 + 0xE600) |
Definition at line 16 of file regs-gpio.h.
#define KS8695_GPIO_PA (KS8695_IO_PA + KS8695_GPIO_OFFSET) |
Definition at line 18 of file regs-gpio.h.
#define KS8695_GPIO_VA (KS8695_IO_VA + KS8695_GPIO_OFFSET) |
Definition at line 17 of file regs-gpio.h.
#define KS8695_IOPC (0x04) /* I/O Port Control Register */ |
Definition at line 22 of file regs-gpio.h.
#define KS8695_IOPD (0x08) /* I/O Port Data Register */ |
Definition at line 23 of file regs-gpio.h.
#define KS8695_IOPM (0x00) /* I/O Port Mode Register */ |
Definition at line 21 of file regs-gpio.h.