regs-pci.h File Reference

Go to the source code of this file.

Macros
#define	KS8695_PCI_OFFSET   (0xF0000 + 0x2000)
#define	KS8695_PCI_VA   (KS8695_IO_VA + KS8695_PCI_OFFSET)
#define	KS8695_PCI_PA   (KS8695_IO_PA + KS8695_PCI_OFFSET)
#define	KS8695_CRCFID   (0x000) /* Configuration: Identification */
#define	KS8695_CRCFCS   (0x004) /* Configuration: Command and Status */
#define	KS8695_CRCFRV   (0x008) /* Configuration: Revision */
#define	KS8695_CRCFLT   (0x00C) /* Configuration: Latency Timer */
#define	KS8695_CRCBMA   (0x010) /* Configuration: Base Memory Address */
#define	KS8695_CRCSID   (0x02C) /* Configuration: Subsystem ID */
#define	KS8695_CRCFIT   (0x03C) /* Configuration: Interrupt */
#define	KS8695_PBCA   (0x100) /* Bridge Configuration Address */
#define	KS8695_PBCD   (0x104) /* Bridge Configuration Data */
#define	KS8695_PBM   (0x200) /* Bridge Mode */
#define	KS8695_PBCS   (0x204) /* Bridge Control and Status */
#define	KS8695_PMBA   (0x208) /* Bridge Memory Base Address */
#define	KS8695_PMBAC   (0x20C) /* Bridge Memory Base Address Control */
#define	KS8695_PMBAM   (0x210) /* Bridge Memory Base Address Mask */
#define	KS8695_PMBAT   (0x214) /* Bridge Memory Base Address Translation */
#define	KS8695_PIOBA   (0x218) /* Bridge I/O Base Address */
#define	KS8695_PIOBAC   (0x21C) /* Bridge I/O Base Address Control */
#define	KS8695_PIOBAM   (0x220) /* Bridge I/O Base Address Mask */
#define	KS8695_PIOBAT   (0x224) /* Bridge I/O Base Address Translation */
#define	CFRV_GUEST   (1 << 23)
#define	PBCA_TYPE1   (1)
#define	PBCA_ENABLE   (1 << 31)

Macro Definition Documentation

#define CFRV_GUEST   (1 << 23)

Definition at line 48 of file regs-pci.h.

#define KS8695_CRCBMA   (0x010) /* Configuration: Base Memory Address */

Definition at line 23 of file regs-pci.h.

#define KS8695_CRCFCS   (0x004) /* Configuration: Command and Status */

Definition at line 20 of file regs-pci.h.

#define KS8695_CRCFID   (0x000) /* Configuration: Identification */

Definition at line 19 of file regs-pci.h.

#define KS8695_CRCFIT   (0x03C) /* Configuration: Interrupt */

Definition at line 25 of file regs-pci.h.

#define KS8695_CRCFLT   (0x00C) /* Configuration: Latency Timer */

Definition at line 22 of file regs-pci.h.

#define KS8695_CRCFRV   (0x008) /* Configuration: Revision */

Definition at line 21 of file regs-pci.h.

#define KS8695_CRCSID   (0x02C) /* Configuration: Subsystem ID */

Definition at line 24 of file regs-pci.h.

#define KS8695_PBCA   (0x100) /* Bridge Configuration Address */

Definition at line 26 of file regs-pci.h.

#define KS8695_PBCD   (0x104) /* Bridge Configuration Data */

Definition at line 27 of file regs-pci.h.

#define KS8695_PBCS   (0x204) /* Bridge Control and Status */

Definition at line 29 of file regs-pci.h.

#define KS8695_PBM   (0x200) /* Bridge Mode */

Definition at line 28 of file regs-pci.h.

#define KS8695_PCI_OFFSET   (0xF0000 + 0x2000)

Definition at line 14 of file regs-pci.h.

#define KS8695_PCI_PA   (KS8695_IO_PA + KS8695_PCI_OFFSET)

Definition at line 16 of file regs-pci.h.

#define KS8695_PCI_VA   (KS8695_IO_VA + KS8695_PCI_OFFSET)

Definition at line 15 of file regs-pci.h.

#define KS8695_PIOBA   (0x218) /* Bridge I/O Base Address */

Definition at line 34 of file regs-pci.h.

#define KS8695_PIOBAC   (0x21C) /* Bridge I/O Base Address Control */

Definition at line 35 of file regs-pci.h.

#define KS8695_PIOBAM   (0x220) /* Bridge I/O Base Address Mask */

Definition at line 36 of file regs-pci.h.

#define KS8695_PIOBAT   (0x224) /* Bridge I/O Base Address Translation */

Definition at line 37 of file regs-pci.h.

#define KS8695_PMBA   (0x208) /* Bridge Memory Base Address */

Definition at line 30 of file regs-pci.h.

#define KS8695_PMBAC   (0x20C) /* Bridge Memory Base Address Control */

Definition at line 31 of file regs-pci.h.

#define KS8695_PMBAM   (0x210) /* Bridge Memory Base Address Mask */

Definition at line 32 of file regs-pci.h.

#define KS8695_PMBAT   (0x214) /* Bridge Memory Base Address Translation */

Definition at line 33 of file regs-pci.h.

#define PBCA_ENABLE   (1 << 31)

Definition at line 51 of file regs-pci.h.

#define PBCA_TYPE1   (1)

Definition at line 50 of file regs-pci.h.