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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Go to the source code of this file.
| #define __ASM_PLAT_S3C64XX_REGS_GPIO_H __FILE__ |
Definition at line 12 of file regs-gpio.h.
| #define S3C64XX_EINT0CON0 S3C64XX_GPIOREG(0x900) |
Definition at line 153 of file regs-gpio.h.
| #define S3C64XX_EINT0CON1 S3C64XX_GPIOREG(0x904) |
Definition at line 154 of file regs-gpio.h.
| #define S3C64XX_EINT0FLTCON0 S3C64XX_GPIOREG(0x910) |
Definition at line 155 of file regs-gpio.h.
| #define S3C64XX_EINT0FLTCON1 S3C64XX_GPIOREG(0x914) |
Definition at line 156 of file regs-gpio.h.
| #define S3C64XX_EINT0FLTCON2 S3C64XX_GPIOREG(0x918) |
Definition at line 157 of file regs-gpio.h.
| #define S3C64XX_EINT0FLTCON3 S3C64XX_GPIOREG(0x91C) |
Definition at line 158 of file regs-gpio.h.
| #define S3C64XX_EINT0MASK S3C64XX_GPIOREG(0x920) |
Definition at line 160 of file regs-gpio.h.
| #define S3C64XX_EINT0PEND S3C64XX_GPIOREG(0x924) |
Definition at line 161 of file regs-gpio.h.
| #define S3C64XX_EINT12CON S3C64XX_GPIOREG(0x200) |
Definition at line 123 of file regs-gpio.h.
| #define S3C64XX_EINT12FLTCON S3C64XX_GPIOREG(0x220) |
Definition at line 129 of file regs-gpio.h.
| #define S3C64XX_EINT12MASK S3C64XX_GPIOREG(0x240) |
Definition at line 135 of file regs-gpio.h.
| #define S3C64XX_EINT12PEND S3C64XX_GPIOREG(0x260) |
Definition at line 141 of file regs-gpio.h.
| #define S3C64XX_EINT34CON S3C64XX_GPIOREG(0x204) |
Definition at line 124 of file regs-gpio.h.
| #define S3C64XX_EINT34FLTCON S3C64XX_GPIOREG(0x224) |
Definition at line 130 of file regs-gpio.h.
| #define S3C64XX_EINT34MASK S3C64XX_GPIOREG(0x244) |
Definition at line 136 of file regs-gpio.h.
| #define S3C64XX_EINT34PEND S3C64XX_GPIOREG(0x264) |
Definition at line 142 of file regs-gpio.h.
| #define S3C64XX_EINT56CON S3C64XX_GPIOREG(0x208) |
Definition at line 125 of file regs-gpio.h.
| #define S3C64XX_EINT56FLTCON S3C64XX_GPIOREG(0x228) |
Definition at line 131 of file regs-gpio.h.
| #define S3C64XX_EINT56MASK S3C64XX_GPIOREG(0x248) |
Definition at line 137 of file regs-gpio.h.
| #define S3C64XX_EINT56PEND S3C64XX_GPIOREG(0x268) |
Definition at line 143 of file regs-gpio.h.
| #define S3C64XX_EINT78CON S3C64XX_GPIOREG(0x20C) |
Definition at line 126 of file regs-gpio.h.
| #define S3C64XX_EINT78FLTCON S3C64XX_GPIOREG(0x22C) |
Definition at line 132 of file regs-gpio.h.
| #define S3C64XX_EINT78MASK S3C64XX_GPIOREG(0x24C) |
Definition at line 138 of file regs-gpio.h.
| #define S3C64XX_EINT78PEND S3C64XX_GPIOREG(0x26C) |
Definition at line 144 of file regs-gpio.h.
| #define S3C64XX_EINT9CON S3C64XX_GPIOREG(0x210) |
Definition at line 127 of file regs-gpio.h.
| #define S3C64XX_EINT9FLTCON S3C64XX_GPIOREG(0x230) |
Definition at line 133 of file regs-gpio.h.
| #define S3C64XX_EINT9MASK S3C64XX_GPIOREG(0x250) |
Definition at line 139 of file regs-gpio.h.
| #define S3C64XX_EINT9PEND S3C64XX_GPIOREG(0x270) |
Definition at line 145 of file regs-gpio.h.
| #define S3C64XX_GPA_BASE S3C64XX_GPIOREG(0x0000) |
Definition at line 18 of file regs-gpio.h.
| #define S3C64XX_GPB_BASE S3C64XX_GPIOREG(0x0020) |
Definition at line 19 of file regs-gpio.h.
| #define S3C64XX_GPC_BASE S3C64XX_GPIOREG(0x0040) |
Definition at line 20 of file regs-gpio.h.
| #define S3C64XX_GPD_BASE S3C64XX_GPIOREG(0x0060) |
Definition at line 21 of file regs-gpio.h.
| #define S3C64XX_GPE_BASE S3C64XX_GPIOREG(0x0080) |
Definition at line 22 of file regs-gpio.h.
| #define S3C64XX_GPF_BASE S3C64XX_GPIOREG(0x00A0) |
Definition at line 23 of file regs-gpio.h.
| #define S3C64XX_GPG_BASE S3C64XX_GPIOREG(0x00C0) |
Definition at line 24 of file regs-gpio.h.
| #define S3C64XX_GPH_BASE S3C64XX_GPIOREG(0x00E0) |
Definition at line 25 of file regs-gpio.h.
| #define S3C64XX_GPI_BASE S3C64XX_GPIOREG(0x0100) |
Definition at line 26 of file regs-gpio.h.
| #define S3C64XX_GPIOREG | ( | reg | ) | (S3C64XX_VA_GPIO + (reg)) |
Definition at line 16 of file regs-gpio.h.
| #define S3C64XX_GPJ_BASE S3C64XX_GPIOREG(0x0120) |
Definition at line 27 of file regs-gpio.h.
| #define S3C64XX_GPK_BASE S3C64XX_GPIOREG(0x0800) |
Definition at line 28 of file regs-gpio.h.
| #define S3C64XX_GPL_BASE S3C64XX_GPIOREG(0x0810) |
Definition at line 29 of file regs-gpio.h.
| #define S3C64XX_GPM_BASE S3C64XX_GPIOREG(0x0820) |
Definition at line 30 of file regs-gpio.h.
| #define S3C64XX_GPN_BASE S3C64XX_GPIOREG(0x0830) |
Definition at line 31 of file regs-gpio.h.
| #define S3C64XX_GPO_BASE S3C64XX_GPIOREG(0x0140) |
Definition at line 32 of file regs-gpio.h.
| #define S3C64XX_GPP_BASE S3C64XX_GPIOREG(0x0160) |
Definition at line 33 of file regs-gpio.h.
| #define S3C64XX_GPQ_BASE S3C64XX_GPIOREG(0x0180) |
Definition at line 34 of file regs-gpio.h.
| #define S3C64XX_PRIORITY S3C64XX_GPIOREG(0x280) |
Definition at line 147 of file regs-gpio.h.
Definition at line 148 of file regs-gpio.h.
| #define S3C64XX_SERVICE S3C64XX_GPIOREG(0x284) |
Definition at line 150 of file regs-gpio.h.
| #define S3C64XX_SERVICEPEND S3C64XX_GPIOREG(0x288) |
Definition at line 151 of file regs-gpio.h.
| #define S3C64XX_SLPEN S3C64XX_GPIOREG(0x930) |
Definition at line 181 of file regs-gpio.h.
| #define S3C64XX_SLPEN_CFG_BYSLPEN (1 << 1) |
Definition at line 184 of file regs-gpio.h.
| #define S3C64XX_SLPEN_USE_xSLP (1 << 0) |
Definition at line 183 of file regs-gpio.h.
| #define S3C64XX_SPCON S3C64XX_GPIOREG(0x1A0) |
Definition at line 38 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_CAM_2mA (0x0 << 30) |
Definition at line 42 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_CAM_4mA (0x1 << 30) |
Definition at line 43 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_CAM_7mA (0x2 << 30) |
Definition at line 44 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_CAM_9mA (0x3 << 30) |
Definition at line 45 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_CAM_MASK (0x3 << 30) |
Definition at line 40 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_CAM_SHIFT (30) |
Definition at line 41 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSMMC_2mA (0x0 << 26) |
Definition at line 56 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSMMC_4mA (0x1 << 26) |
Definition at line 57 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSMMC_7mA (0x2 << 26) |
Definition at line 58 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSMMC_9mA (0x3 << 26) |
Definition at line 59 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSMMC_MASK (0x3 << 26) |
Definition at line 54 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSMMC_SHIFT (26) |
Definition at line 55 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSSPI_2mA (0x0 << 28) |
Definition at line 49 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSSPI_4mA (0x1 << 28) |
Definition at line 50 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSSPI_7mA (0x2 << 28) |
Definition at line 51 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSSPI_9mA (0x3 << 28) |
Definition at line 52 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSSPI_MASK (0x3 << 28) |
Definition at line 47 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_HSSPI_SHIFT (28) |
Definition at line 48 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_LCD_2mA (0x0 << 24) |
Definition at line 63 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_LCD_4mA (0x1 << 24) |
Definition at line 64 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_LCD_7mA (0x2 << 24) |
Definition at line 65 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_LCD_9mA (0x3 << 24) |
Definition at line 66 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_LCD_MASK (0x3 << 24) |
Definition at line 61 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_LCD_SHIFT (24) |
Definition at line 62 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_MODEM_2mA (0x0 << 22) |
Definition at line 70 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_MODEM_4mA (0x1 << 22) |
Definition at line 71 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_MODEM_7mA (0x2 << 22) |
Definition at line 72 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_MODEM_9mA (0x3 << 22) |
Definition at line 73 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_MODEM_MASK (0x3 << 22) |
Definition at line 68 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_MODEM_SHIFT (22) |
Definition at line 69 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_SPICLK1_2mA (0x0 << 18) |
Definition at line 79 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_SPICLK1_4mA (0x1 << 18) |
Definition at line 80 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_SPICLK1_7mA (0x2 << 18) |
Definition at line 81 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_SPICLK1_9mA (0x3 << 18) |
Definition at line 82 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_SPICLK1_MASK (0x3 << 18) |
Definition at line 77 of file regs-gpio.h.
| #define S3C64XX_SPCON_DRVCON_SPICLK1_SHIFT (18) |
Definition at line 78 of file regs-gpio.h.
| #define S3C64XX_SPCON_LCD_SEL_606_656 (0x2 << 0) |
Definition at line 118 of file regs-gpio.h.
| #define S3C64XX_SPCON_LCD_SEL_HOST (0x0 << 0) |
Definition at line 116 of file regs-gpio.h.
| #define S3C64XX_SPCON_LCD_SEL_MASK (0x3 << 0) |
Definition at line 114 of file regs-gpio.h.
| #define S3C64XX_SPCON_LCD_SEL_RGB (0x1 << 0) |
Definition at line 117 of file regs-gpio.h.
| #define S3C64XX_SPCON_LCD_SEL_SHIFT (0) |
Definition at line 115 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM0_D_PUD_DISABLED (0x0 << 8) |
Definition at line 104 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM0_D_PUD_DOWN (0x1 << 8) |
Definition at line 105 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM0_D_PUD_MASK (0x3 << 8) |
Definition at line 102 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM0_D_PUD_SHIFT (8) |
Definition at line 103 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM0_D_PUD_UP (0x2 << 8) |
Definition at line 106 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD0_DISABLED (0x0 << 12) |
Definition at line 98 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD0_DOWN (0x1 << 12) |
Definition at line 99 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD0_MASK (0x3 << 12) |
Definition at line 96 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD0_SHIFT (12) |
Definition at line 97 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD0_UP (0x2 << 12) |
Definition at line 100 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD1_DISABLED (0x0 << 14) |
Definition at line 92 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD1_DOWN (0x1 << 14) |
Definition at line 93 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD1_MASK (0x3 << 14) |
Definition at line 90 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD1_SHIFT (14) |
Definition at line 91 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_D_PUD1_UP (0x2 << 14) |
Definition at line 94 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_DQS_PUD_DISABLED (0x0 << 16) |
Definition at line 86 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_DQS_PUD_DOWN (0x1 << 16) |
Definition at line 87 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_DQS_PUD_MASK (0x3 << 16) |
Definition at line 84 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_DQS_PUD_SHIFT (16) |
Definition at line 85 of file regs-gpio.h.
| #define S3C64XX_SPCON_MEM1_DQS_PUD_UP (0x2 << 16) |
Definition at line 88 of file regs-gpio.h.
| #define S3C64XX_SPCON_nRSTOUT_OEN (1 << 21) |
Definition at line 75 of file regs-gpio.h.
| #define S3C64XX_SPCON_USBH_DMPD (1 << 7) |
Definition at line 108 of file regs-gpio.h.
| #define S3C64XX_SPCON_USBH_DPPD (1 << 6) |
Definition at line 109 of file regs-gpio.h.
| #define S3C64XX_SPCON_USBH_PUSW1 (1 << 4) |
Definition at line 111 of file regs-gpio.h.
| #define S3C64XX_SPCON_USBH_PUSW2 (1 << 5) |
Definition at line 110 of file regs-gpio.h.
| #define S3C64XX_SPCON_USBH_SUSPND (1 << 3) |
Definition at line 112 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP S3C64XX_GPIOREG(0x880) |
Definition at line 165 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_CKE1INIT (1 << 5) |
Definition at line 168 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_KPCOL_INP (0x2 << 0) |
Definition at line 178 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_KPCOL_MASK (0x3 << 0) |
Definition at line 175 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_KPCOL_OUT0 (0x0 << 0) |
Definition at line 176 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_KPCOL_OUT1 (0x1 << 0) |
Definition at line 177 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_RSTOUT_HIZ (0x2 << 12) |
Definition at line 173 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_RSTOUT_MASK (0x3 << 12) |
Definition at line 170 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_RSTOUT_OUT0 (0x0 << 12) |
Definition at line 171 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_RSTOUT_OUT1 (0x1 << 12) |
Definition at line 172 of file regs-gpio.h.
| #define S3C64XX_SPCONSLP_TDO_PULLDOWN (1 << 14) |
Definition at line 167 of file regs-gpio.h.
1.8.2