Linux Kernel
3.7.1
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#include <mach/map.h>
Go to the source code of this file.
#define __ASM_ARCH_REGS_GPIO_H __FILE__ |
Definition at line 14 of file regs-gpio.h.
#define EINT0CON0_OFFSET (0x900) |
Definition at line 53 of file regs-gpio.h.
#define EINT0FLTCON0_OFFSET (0x910) |
Definition at line 54 of file regs-gpio.h.
#define EINT0FLTCON1_OFFSET (0x914) |
Definition at line 55 of file regs-gpio.h.
#define EINT0MASK_OFFSET (0x920) |
Definition at line 56 of file regs-gpio.h.
#define EINT0PEND_OFFSET (0x924) |
Definition at line 57 of file regs-gpio.h.
#define S5P6450_GPD_BASE (S5P_VA_GPIO + 0x0060) |
Definition at line 32 of file regs-gpio.h.
#define S5P6450_GPK_BASE (S5P_VA_GPIO + 0x0140) |
Definition at line 33 of file regs-gpio.h.
#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) |
Definition at line 34 of file regs-gpio.h.
#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) |
Definition at line 35 of file regs-gpio.h.
#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) |
Definition at line 59 of file regs-gpio.h.
#define S5P64X0_EINT0FLTCON0 (S5P_VA_GPIO + EINT0FLTCON0_OFFSET) |
Definition at line 60 of file regs-gpio.h.
#define S5P64X0_EINT0FLTCON1 (S5P_VA_GPIO + EINT0FLTCON1_OFFSET) |
Definition at line 61 of file regs-gpio.h.
#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) |
Definition at line 62 of file regs-gpio.h.
#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) |
Definition at line 63 of file regs-gpio.h.
#define S5P64X0_EINT12CON (S5P_VA_GPIO + 0x200) |
Definition at line 47 of file regs-gpio.h.
#define S5P64X0_EINT12FLTCON (S5P_VA_GPIO + 0x220) |
Definition at line 48 of file regs-gpio.h.
#define S5P64X0_EINT12MASK (S5P_VA_GPIO + 0x240) |
Definition at line 49 of file regs-gpio.h.
#define S5P64X0_GPA_BASE (S5P_VA_GPIO + 0x0000) |
Definition at line 20 of file regs-gpio.h.
#define S5P64X0_GPB_BASE (S5P_VA_GPIO + 0x0020) |
Definition at line 21 of file regs-gpio.h.
#define S5P64X0_GPC_BASE (S5P_VA_GPIO + 0x0040) |
Definition at line 22 of file regs-gpio.h.
#define S5P64X0_GPF_BASE (S5P_VA_GPIO + 0x00A0) |
Definition at line 23 of file regs-gpio.h.
#define S5P64X0_GPG_BASE (S5P_VA_GPIO + 0x00C0) |
Definition at line 24 of file regs-gpio.h.
#define S5P64X0_GPH_BASE (S5P_VA_GPIO + 0x00E0) |
Definition at line 25 of file regs-gpio.h.
#define S5P64X0_GPI_BASE (S5P_VA_GPIO + 0x0100) |
Definition at line 26 of file regs-gpio.h.
#define S5P64X0_GPJ_BASE (S5P_VA_GPIO + 0x0120) |
Definition at line 27 of file regs-gpio.h.
#define S5P64X0_GPN_BASE (S5P_VA_GPIO + 0x0830) |
Definition at line 28 of file regs-gpio.h.
#define S5P64X0_GPP_BASE (S5P_VA_GPIO + 0x0160) |
Definition at line 29 of file regs-gpio.h.
#define S5P64X0_GPR_BASE (S5P_VA_GPIO + 0x0290) |
Definition at line 30 of file regs-gpio.h.
#define S5P64X0_MEM0CONSLP0 (S5P_VA_GPIO + 0x1C0) |
Definition at line 42 of file regs-gpio.h.
#define S5P64X0_MEM0CONSLP1 (S5P_VA_GPIO + 0x1C4) |
Definition at line 43 of file regs-gpio.h.
#define S5P64X0_MEM0DRVCON (S5P_VA_GPIO + 0x1D0) |
Definition at line 44 of file regs-gpio.h.
#define S5P64X0_MEM1DRVCON (S5P_VA_GPIO + 0x1D4) |
Definition at line 45 of file regs-gpio.h.
#define S5P64X0_SLPEN (S5P_VA_GPIO + 0x930) |
Definition at line 65 of file regs-gpio.h.
#define S5P64X0_SLPEN_USE_xSLP (1 << 0) |
Definition at line 66 of file regs-gpio.h.
#define S5P64X0_SPCON0 (S5P_VA_GPIO + 0x1A0) |
Definition at line 37 of file regs-gpio.h.
#define S5P64X0_SPCON0_LCD_SEL_MASK (0x3 << 0) |
Definition at line 38 of file regs-gpio.h.
#define S5P64X0_SPCON0_LCD_SEL_RGB (0x1 << 0) |
Definition at line 39 of file regs-gpio.h.
#define S5P64X0_SPCON1 (S5P_VA_GPIO + 0x2B0) |
Definition at line 40 of file regs-gpio.h.